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7 Commits

Author SHA1 Message Date
Chen Feiyue 4fde0badb2
Refine UnitTest which have acc issue or unspport issue in sp (#659) 
1.Skip elementwise/relational op unittest if input/output have INF which sp cannot
handle
2.Set different tolerance in Layernom/SoftMax/GRU unittest if SP supported

Type: Bug Fix
Issue: 37103

Signed-off-by: Feiyue Chen <Feiyue.Chen@verisilicon.com>
 2023-11-20 14:42:41 +08:00
Tang d778dfb82d update copyright information 2023-01-20 12:49:48 +08:00
ZhangXiang 6d47ee3ac1 Expose hw feature : isClOnly() 
Signed-off-by: ZhangXiang <Xiang.Zhang@verisilicon.com>
 2022-08-03 09:06:32 +08:00
Sven 08500158ba
Fix build error with clang (#326) 
Signed-off-by: ZhangXiang <Xiang.Zhang@verisilicon.com>
 2022-03-22 14:51:12 +08:00
Sven 7c1a00213b
[New API] Add compile_option support - relax_mode (#285) 
Added new API for tim::vx::Context::CreateGraph with a CompileOption

Only one option added in CompileOption:
    relax_mode : Run float32 mode with bfloat16

Signed-off-by: xiang.zhang <xiang.zhang@verisilicon.com>
 2022-02-09 10:52:11 +08:00
xiang.zhang 9d44b4477b Added NBG support 
Signed-off-by: xiang.zhang <xiang.zhang@verisilicon.com>
 2021-02-22 11:38:21 +08:00
Jiang Bo 7972af0697 Initial Commit for VERSION 1.1.28 
Signed-off-by: Jiang Bo <bo.jiang@verisilicon.com>
 2021-01-11 18:27:48 +08:00