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14 Commits

Author SHA1 Message Date
Sven f8846e701e
Update CMakeLists.txt (#187) 
Enable build tim-vx as dynamic-library by default will be more friendly for other repo such as tflite-vx-delegate.
 2021-10-12 19:50:55 +08:00
Goose Bomb 914e280209
Refactor CMake build system (#184) 
* Remove unnecessary compiler flags

* Refactor CMakeLists.txt

* Tweak CMakeLists.txt for libtim_internal

* Tweak CMakeLists.txt for libtim-vx

* Make TIM_VX_ENABLE_TEST defaults to OFF

* Eliminate usage of include_directories

* Fix CI unit test
 2021-10-12 10:44:49 +08:00
Kainan Cha d7900b9de4 Add sample to run NBG 
Signed-off-by: Kainan Cha <kainan.cha@verisilicon.com>
Signed-off-by: xiang.zhang <xiang.zhang@verisilicon.com>
 2021-09-27 17:21:04 +08:00
Jing.Deng be066fb9bd add float32, uint8 and int8 unit_tests for transposeConv2d 
Signed-off-by: Jing.Deng <Jing.Deng@verisilicon.com>
 2021-06-24 21:27:16 +08:00
Robert Kalmar 64989c6b4a Added option to use extenal OVXLIB library 
Signed-off-by: Robert Kalmar <robert.kalmar@nxp.com>
 2021-06-16 15:00:35 +08:00
xiang.zhang b1b7eadefc Add group parameter for deconv API 
Limitation: only support depthwise deconvolution

Signed-off-by: xiang.zhang <xiang.zhang@verisilicon.com>
 2021-05-20 06:15:28 +08:00
Sven 66dd29703e
Refine cmake build: add gtest (#47) 
Signed-off-by: xiang.zhang <xiang.zhang@verisilicon.com>
 2021-05-17 13:04:45 +08:00
Sven fd15d507f2
remove unit test file with regex (#42) 
Signed-off-by: xiang.zhang <xiang.zhang@verisilicon.com>
 2021-05-14 14:00:22 +08:00
Kainan Cha ef69e466c7 Move all UT to tim/vx/ut directory 
Signed-off-by: Kainan Cha <kainan.zha@verisilicon.com>
 2021-05-12 16:32:40 +08:00
Kainan Cha 301d88a5a6 Add support for relational ops 
Signed-off-by: Kainan Cha <kainan.zha@verisilicon.com>
 2021-05-11 23:39:22 +08:00
Kainan Cha 40139e31dd Remove unit_test from CMake 
Signed-off-by: Kainan Cha <kainan.zha@verisilicon.com>
 2021-05-11 19:58:37 +08:00
Kainan Cha 22fd359ab2 Fix CMake build error 
Signed-off-by: Kainan Cha <kainan.zha@verisilicon.com>
 2021-05-11 13:44:32 +08:00
Sven a42517fdce
Align directory name to namespace for layout inference (#38) 
Signed-off-by: xiang.zhang <xiang.zhang@verisilicon.com>
 2021-05-11 09:46:46 +08:00
Zongwu.Yang 22d423714f
Optimize permute op for constant tensor (#37) 
Signed-off-by: Zongwu Yang <zongwu.yang@verisilicon.com>
 2021-05-10 23:06:04 +08:00