Commit Graph

4 Commits

Author SHA1 Message Date
chxin66 f1fd2246ae
Support tensor cache while create tensor (#574)
Support tensor cache while create tensor

Tensor can be shared between different operations, if tensor have 
identical data and quantization parameter, they should share same
low-level tensor object to save memory.

In tim-vx, introduce a tensor cache which key is md5sum and value is 
low-level tensor object. If up-coming tensor have same md5sum, the
cached tensor object reused for tensor creation.

Type: New feature

Signed-off-by: Chen Xin <jack.chen@verisilicon.com>
Co-authored-by: Chen Xin <jack.chen@verisilicon.com>
2023-04-19 21:31:25 +08:00
Chen Xin 5e7f5cecea Fixed grouped_conv2d layout infer & Added cases
added cases for conv2d/grouped_conv2d

Type: Bug fixed

Signed-off-by: Chen Xin <jack.chen@verisilicon.com>
2023-01-20 15:28:21 +08:00
Chen Xin 0e211c8efd Fixed (groupd)conv2d layout infer bug
And added a weight_as_input case to test

Type: Bug Fix

Signed-off-by: Chen Xin <jack.chen@verisilicon.com>
2022-12-16 15:20:56 +08:00
Sven a42517fdce
Align directory name to namespace for layout inference (#38)
Signed-off-by: xiang.zhang <xiang.zhang@verisilicon.com>
2021-05-11 09:46:46 +08:00