chxin66
11d12f03a8
fix layoutinfer crash when logical op inputs are different rank ( #667 )
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Type: Bug fix
Signed-off-by: Chen <jack.chen@verisilicon.com>
Co-authored-by: Chen <jack.chen@verisilicon.com>
2023-12-13 09:57:17 +08:00
Tang
d778dfb82d
update copyright information
2023-01-20 12:49:48 +08:00
Chen Xin
9b13b6f677
Replace name direct_map_op with builtin_op
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Signed-off-by: Chen Xin <jack.chen@verisilicon.com>
2022-09-19 10:21:19 +08:00
chxin66
cea11422b8
Added RNNCell & unit test ( #249 )
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Signed-off-by: Chen Xin <jack.chen@verisilicon.com>
Co-authored-by: Chen Xin <jack.chen@verisilicon.com>
2021-12-29 11:08:24 +08:00
Goose Bomb
914e280209
Refactor CMake build system ( #184 )
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* Remove unnecessary compiler flags
* Refactor CMakeLists.txt
* Tweak CMakeLists.txt for libtim_internal
* Tweak CMakeLists.txt for libtim-vx
* Make TIM_VX_ENABLE_TEST defaults to OFF
* Eliminate usage of include_directories
* Fix CI unit test
2021-10-12 10:44:49 +08:00
yuenan.li
1f08618403
Supprt layout inference for Operations
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Signed-off-by: yuenan.li <yuenan.li@verisilicon.com>
2021-06-02 00:53:11 +08:00