Commit Graph

4 Commits

Author SHA1 Message Date
chxin66 6424ef104e
Fixed the IOtensor order difference between src_graph and infer_graph
* Fixed the IOtensor order difference between src_graph and infer_graph

Graph Input/Output tensor sequence may changed after graph
transformation(layout infer), it is difficult to get the IO mapping
between original graph and final graph.

Clients such as the Android Support Library create tensors using the
original input/output order, which may not be the same as the input
order of src_graph, the data can not be setup correctly.

Solution:
Decide the order of inputs/outputs while creating tensor not at binding to
operation. The order of binding could be change in each transform.

Type:Code improvement

Signed-off-by: Chen Xin <jack.chen@verisilicon.com>

* Fixed maxpoolgrad maxpoolwithargmax2 cases

Some tensors created with wrong attr

Type: Bug fix

Signed-off-by: Chen Xin <jack.chen@verisilicon.com>

---------

Signed-off-by: Chen Xin <jack.chen@verisilicon.com>
Co-authored-by: Chen Xin <jack.chen@verisilicon.com>
2023-03-21 09:21:15 +08:00
Tang d778dfb82d update copyright information 2023-01-20 12:49:48 +08:00
Chen Xin 72f2c5b69e Supported composed layout infer & added unit test
Fixed fc layout infer in rnncell layout infer
2022-09-26 14:29:46 +08:00
Chen Xin 9b13b6f677 Replace name direct_map_op with builtin_op
Signed-off-by: Chen Xin <jack.chen@verisilicon.com>
2022-09-19 10:21:19 +08:00