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28 Commits

Author SHA1 Message Date
chxin66 4f92e58155
optimization for tiny_yolov4 (#591) 
Type: code improvment

Signed-off-by: Chen <jack.chen@verisilicon.com>
Co-authored-by: Chen <jack.chen@verisilicon.com>
 2023-05-23 14:28:47 +08:00
chxin66 308a967bcf
Support build openssl from local repo (#582) 
Type: Code Improvement

Signed-off-by: Chen Xin <jack.chen@verisilicon.com>
Co-authored-by: Chen Xin <jack.chen@verisilicon.com>
 2023-05-05 23:38:39 +08:00
chxin66 f1fd2246ae
Support tensor cache while create tensor (#574) 
Support tensor cache while create tensor

Tensor can be shared between different operations, if tensor have 
identical data and quantization parameter, they should share same
low-level tensor object to save memory.

In tim-vx, introduce a tensor cache which key is md5sum and value is 
low-level tensor object. If up-coming tensor have same md5sum, the
cached tensor object reused for tensor creation.

Type: New feature

Signed-off-by: Chen Xin <jack.chen@verisilicon.com>
Co-authored-by: Chen Xin <jack.chen@verisilicon.com>
 2023-04-19 21:31:25 +08:00
Chen Feiyue 6e38e64a1a
Update internal & prebuilt-sdk for 23Q1 release (#573) 
Update internal to 0e9393dbb4f653b9dfceaeaaa920d4deb8b27077
Update prebuilt-sdk to 6.4.14 release
Update cmakefiles to support above updates

Type: New Feature

Signed-off-by: Feiyue Chen <Feiyue.Chen@verisilicon.com>
 2023-04-18 22:19:16 +08:00
liyuenan 27890719b6
Support remote platform by gRPC (#561) 
* Support remote platform by gRPC

Signed-off-by: yuenan.li <yuenan.li@verisilicon.com>
 2023-03-28 09:51:23 +08:00
Sven 9de8df404c
Feat: disable maxpoolwithargmax2 feature if no low-level feature avaiable (#471) 
Convert operation list as compiler flags in cmake, when add new
operation in tim-vx, always check if the feature define is available or
not - so that tim-vx can compile with legacy ovxlib library.

Signed-off-by: xiang.zhang <xiang.zhang@verisilicon.com>
 2022-09-01 18:56:49 +08:00
lucklee 70d2f410a8
support virtual vip devices (#331) 2022-04-06 13:05:38 +08:00
Zhouheng Zheng d1b57e8eca
Add cmake option of custom op support (#335) 
Co-authored-by: zhouheng.zheng <zhouheng.zheng@ouotlook.com>
 2022-03-28 09:42:19 +08:00
Zhouheng Zheng b02aa8b8c4
Added customize operator APIs(#315) 
Co-authored-by: zhouheng.zheng <zhouheng.zheng@ouotlook.com>
 2022-03-09 12:10:08 +08:00
robert-kalmar 51a3d8ce36
Install headers to place defined by CMAKE_INSTALL_INCLUDEDIR variable (#291) 2022-02-21 10:20:38 +08:00
Sven 7c1a00213b
[New API] Add compile_option support - relax_mode (#285) 
Added new API for tim::vx::Context::CreateGraph with a CompileOption

Only one option added in CompileOption:
    relax_mode : Run float32 mode with bfloat16

Signed-off-by: xiang.zhang <xiang.zhang@verisilicon.com>
 2022-02-09 10:52:11 +08:00
Sven 321a53fd2a
Support single static-library for libtim-vx.a (#237) 
Fix external ovxlib build failure, and change install dir to CMAKE_INSTALL_LIBDIR

Signed-off-by: xiang.zhang <xiang.zhang@verisilicon.com>
Co-authored-by: yuenan.li <yuenan.li@verisilicon.com>
 2021-12-15 22:23:32 +08:00
Sven 62a33ecfde
Install libtim-vx.so to lib64 if build for aarch64 (#225) 
* Install libtim-vx.so to lib64 if build for aarch64

Signed-off-by: xiang.zhang <xiang.zhang@verisilicon.com>
 2021-11-24 15:18:29 +08:00
Zongwu.Yang d019a76db5
Add function for lite driver handle (#209) 
Signed-off-by: Zongwu Yang <zongwu.yang@verisilicon.com>
 2021-11-10 20:05:31 +08:00
Sven f8846e701e
Update CMakeLists.txt (#187) 
Enable build tim-vx as dynamic-library by default will be more friendly for other repo such as tflite-vx-delegate.
 2021-10-12 19:50:55 +08:00
Goose Bomb 914e280209
Refactor CMake build system (#184) 
* Remove unnecessary compiler flags

* Refactor CMakeLists.txt

* Tweak CMakeLists.txt for libtim_internal

* Tweak CMakeLists.txt for libtim-vx

* Make TIM_VX_ENABLE_TEST defaults to OFF

* Eliminate usage of include_directories

* Fix CI unit test
 2021-10-12 10:44:49 +08:00
Kainan Cha d7900b9de4 Add sample to run NBG 
Signed-off-by: Kainan Cha <kainan.cha@verisilicon.com>
Signed-off-by: xiang.zhang <xiang.zhang@verisilicon.com>
 2021-09-27 17:21:04 +08:00
Jing.Deng be066fb9bd add float32, uint8 and int8 unit_tests for transposeConv2d 
Signed-off-by: Jing.Deng <Jing.Deng@verisilicon.com>
 2021-06-24 21:27:16 +08:00
Robert Kalmar 64989c6b4a Added option to use extenal OVXLIB library 
Signed-off-by: Robert Kalmar <robert.kalmar@nxp.com>
 2021-06-16 15:00:35 +08:00
xiang.zhang b1b7eadefc Add group parameter for deconv API 
Limitation: only support depthwise deconvolution

Signed-off-by: xiang.zhang <xiang.zhang@verisilicon.com>
 2021-05-20 06:15:28 +08:00
Sven 66dd29703e
Refine cmake build: add gtest (#47) 
Signed-off-by: xiang.zhang <xiang.zhang@verisilicon.com>
 2021-05-17 13:04:45 +08:00
Sven fd15d507f2
remove unit test file with regex (#42) 
Signed-off-by: xiang.zhang <xiang.zhang@verisilicon.com>
 2021-05-14 14:00:22 +08:00
Kainan Cha ef69e466c7 Move all UT to tim/vx/ut directory 
Signed-off-by: Kainan Cha <kainan.zha@verisilicon.com>
 2021-05-12 16:32:40 +08:00
Kainan Cha 301d88a5a6 Add support for relational ops 
Signed-off-by: Kainan Cha <kainan.zha@verisilicon.com>
 2021-05-11 23:39:22 +08:00
Kainan Cha 40139e31dd Remove unit_test from CMake 
Signed-off-by: Kainan Cha <kainan.zha@verisilicon.com>
 2021-05-11 19:58:37 +08:00
Kainan Cha 22fd359ab2 Fix CMake build error 
Signed-off-by: Kainan Cha <kainan.zha@verisilicon.com>
 2021-05-11 13:44:32 +08:00
Sven a42517fdce
Align directory name to namespace for layout inference (#38) 
Signed-off-by: xiang.zhang <xiang.zhang@verisilicon.com>
 2021-05-11 09:46:46 +08:00
Zongwu.Yang 22d423714f
Optimize permute op for constant tensor (#37) 
Signed-off-by: Zongwu Yang <zongwu.yang@verisilicon.com>
 2021-05-10 23:06:04 +08:00