cea11422b8
Added RNNCell & unit test ( #249 )
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Signed-off-by: Chen Xin <jack.chen@verisilicon.com>
Co-authored-by: Chen Xin <jack.chen@verisilicon.com>
2021-12-29 11:08:24 +08:00
914e280209
Refactor CMake build system ( #184 )
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* Remove unnecessary compiler flags
* Refactor CMakeLists.txt
* Tweak CMakeLists.txt for libtim_internal
* Tweak CMakeLists.txt for libtim-vx
* Make TIM_VX_ENABLE_TEST defaults to OFF
* Eliminate usage of include_directories
* Fix CI unit test
2021-10-12 10:44:49 +08:00
29f1efc492
add API 'Clone' to tim_vx op and support default layout inference
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Signed-off-by: yuenan.li <yuenan.li@verisilicon.com>
2021-07-06 12:29:18 +08:00
1f08618403
Supprt layout inference for Operations
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Signed-off-by: yuenan.li <yuenan.li@verisilicon.com>
2021-06-02 00:53:11 +08:00
a42517fdce
Align directory name to namespace for layout inference ( #38 )
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Signed-off-by: xiang.zhang <xiang.zhang@verisilicon.com>
2021-05-11 09:46:46 +08:00
chxin66
Goose Bomb
yuenan.li
Sven