8a15abf12b
Add ScatterND
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Signed-off-by: zhao.xia <zhao.xia@verisilicon.com>
2021-06-03 11:22:58 +08:00
39bd5ddd32
Add support for Linear Activation
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Signed-off-by: Kainan Cha <kainan.zha@verisilicon.com>
2021-06-02 17:10:57 +08:00
94fe57489b
Update OP readme
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Signed-off-by: Kainan Cha <kainan.zha@verisilicon.com>
2021-06-02 01:03:20 +08:00
26948d6646
Rename Unmaxpool2d to MaxUnpool2d
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Signed-off-by: zhao.xia <zhao.xia@verisilicon.com>
Signed-off-by: Kainan Cha <kainan.zha@verisilicon.com>
2021-05-31 12:48:51 +08:00
9c60671031
Add map for UnMaxpool2d ( #83 )
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Signed-off-by: zhao.xia <zhao.xia@verisilicon.com>
2021-05-28 17:09:26 +08:00
18a928ee69
Add Op MaxpoolWithArgmax
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Signed-off-by: Kainan Cha <kainan.zha@verisilicon.com>
2021-05-27 18:59:35 +08:00
a1ba85691a
Add map for LogSoftmax
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Signed-off-by: zhao.xia <zhao.xia@verisilicon.com>
2021-05-26 11:37:16 +08:00
2ff1f5fed1
Update operation README
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Signed-off-by: Kainan Cha <kainan.zha@verisilicon.com>
2021-05-25 13:52:56 +08:00
f90f3eedfd
Add map for Resize1d ( #69 )
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Signed-off-by: zhao.xia <zhao.xia@verisilicon.com>
2021-05-25 10:27:23 +08:00
d0dadbc0fb
Add support for FloorDiv
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Signed-off-by: Kainan Cha <kainan.zha@verisilicon.com>
2021-05-25 01:20:43 +08:00
33fd1f0c58
Add map for DeConv1d ( #62 )
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Signed-off-by: zhao.xia <zhao.xia@verisilicon.com>
2021-05-24 23:41:15 +08:00
be0a566042
Add map for Conv1D
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Convolution 1D operation, support float32, int8, int16, uint8.
Signed-off-by: zhao.xia <zhao.xia@verisilicon.com>
2021-05-21 12:46:56 +08:00
88f7141cfe
Support LayerNormalization
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Layer normalization only support float32 data type.
Signed-off-by: zhao.xia <zhao.xia@verisilicon.com>
2021-05-21 12:46:19 +08:00
b4b6a369a7
Add map for InstanceNormalization
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Currently instance normalization only support float32 data type.
Signed-off-by: zhao.xia <zhao.xia@verisilicon.com>
2021-05-20 12:41:25 +08:00
7c0d2f59bb
Update op README
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Signed-off-by: Kainan Cha <kainan.zha@verisilicon.com>
2021-05-20 06:15:46 +08:00
baea9b827f
Add ANEURALNETWORKS API reference
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Signed-off-by: Kainan Cha <kainan.zha@verisilicon.com>
2021-05-18 14:24:17 +08:00
7770a8fd91
Update Op README
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Signed-off-by: Kainan Cha <kainan.zha@verisilicon.com>
2021-05-18 02:07:52 +08:00
e05b6f7404
Update operation README with reference
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These links are for reference only, actually implementation
may vary in terms of dimensions and parameters supported.
Signed-off-by: Kainan Cha <kainan.zha@verisilicon.com>
2021-05-18 01:58:08 +08:00
301d88a5a6
Add support for relational ops
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Signed-off-by: Kainan Cha <kainan.zha@verisilicon.com>
2021-05-11 23:39:22 +08:00
d92e08e502
Add support for Cast and Floor operation
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Signed-off-by: Kainan Cha <kainan.zha@verisilicon.com>
2021-05-11 18:45:28 +08:00
c2e10efb50
Add support for Reorg
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The Reorg implementation is that of YOLOv2.
Signed-off-by: Kainan Cha <kainan.zha@verisilicon.com>
2021-05-11 10:57:56 +08:00
eff71c38bf
add argmin and argmax op
2021-04-16 00:34:29 +08:00
c9d3416c6b
Add the Squeeze op
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Signed-off-by: yuenan.li <yuenan.li@verisilicon.com>
2021-04-15 11:22:48 +08:00
dc67e9ac63
add the Stack op
2021-04-07 19:57:28 +08:00
07fc3b9914
add the clip, dropout, batchnorm op
2021-04-07 13:00:41 +08:00
90a52ea6c9
Add support for Mish, SoftRelu and HardSigmoid
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Signed-off-by: Kainan Cha <kainan.cha@verisilicon.com>
2021-03-31 12:00:02 +08:00
c569555f1f
Use FCL2 instead of FCL which supports axis
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Signed-off-by: Kainan Cha <kainan.zha@verisilicon.com>
2021-03-29 17:08:22 +08:00
8f1c33ea83
add README.md for op support
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Signed-off-by: yuenan.li <yuenan.li@verisilicon.com>
2021-03-16 11:46:57 +08:00
zhao.xia
Kainan Cha
Nightingale
zhengzhouheng
yuenan.li
Kainan Cha