yuenan.li
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29f1efc492
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add API 'Clone' to tim_vx op and support default layout inference
Signed-off-by: yuenan.li <yuenan.li@verisilicon.com>
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2021-07-06 12:29:18 +08:00 |
xiang.zhang
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574c036a69
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Fix FullyConnect layer crash
Signed-off-by: xiang.zhang <xiang.zhang@verisilicon.com>
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2021-06-16 16:05:16 +08:00 |
zhao.xia
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0ed1e8947f
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Add new APIs for conv, deconv and fc
The new apis remvoe weights, oc_count and ksize.
Signed-off-by: zhao.xia <zhao.xia@verisilicon.com>
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2021-06-07 21:48:13 +08:00 |
Kainan Cha
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c569555f1f
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Use FCL2 instead of FCL which supports axis
Signed-off-by: Kainan Cha <kainan.zha@verisilicon.com>
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2021-03-29 17:08:22 +08:00 |
Jiang Bo
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7972af0697
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Initial Commit for VERSION 1.1.28
Signed-off-by: Jiang Bo <bo.jiang@verisilicon.com>
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2021-01-11 18:27:48 +08:00 |