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39 Commits

Author SHA1 Message Date
jing.tang a364c3eafb add Swish op 2021-08-16 19:30:14 +08:00
xiang.zhang e27e15925c Add unidirectional sequence lstm support 
Signed-off-by: xiang.zhang <xiang.zhang@verisilicon.com>
 2021-08-09 13:43:33 +08:00
jing.tang f0d4118f87 Update ops doc for internal 1.1.32.1 2021-08-04 11:30:45 +08:00
zhao.xia 8aa11f5f29 Support SpatialTransformer 
Signed-off-by: zhao.xia <zhao.xia@verisilicon.com>
 2021-07-06 12:56:28 +08:00
zhao.xia 21ecf5262e Add map for Matmul 
Signed-off-by: zhao.xia <zhao.xia@verisilicon.com>
 2021-06-29 16:06:35 +08:00
zhao.xia 3fa2bf519a Add map for moments 
Signed-off-by: zhao.xia <zhao.xia@verisilicon.com>
 2021-06-29 15:58:51 +08:00
Kainan Cha 9e10d88fc7 Update OP ReadMe 
Signed-off-by: Kainan Cha <kainan.zha@verisilicon.com>
 2021-06-07 12:39:42 +08:00
zhao.xia f59f26412b Add GroupedConv2d 
Signed-off-by: zhao.xia <zhao.xia@verisilicon.com>
 2021-06-04 16:53:25 +08:00
zhao.xia 353feca56a Add tile 
Signed-off-by: zhao.xia <zhao.xia@verisilicon.com>
 2021-06-03 18:29:32 +08:00
zhao.xia 748658e47d Add Unstack 
Signed-off-by: zhao.xia <zhao.xia@verisilicon.com>
 2021-06-03 16:24:31 +08:00
Kainan Cha 89c7b27693 Update README 
Signed-off-by: Kainan Cha <kainan.zha@verisilicon.com>
 2021-06-03 12:10:24 +08:00
zhao.xia 8a15abf12b Add ScatterND 
Signed-off-by: zhao.xia <zhao.xia@verisilicon.com>
 2021-06-03 11:22:58 +08:00
Kainan Cha 39bd5ddd32 Add support for Linear Activation 
Signed-off-by: Kainan Cha <kainan.zha@verisilicon.com>
 2021-06-02 17:10:57 +08:00
Kainan Cha 94fe57489b Update OP readme 
Signed-off-by: Kainan Cha <kainan.zha@verisilicon.com>
 2021-06-02 01:03:20 +08:00
zhao.xia 26948d6646 Rename Unmaxpool2d to MaxUnpool2d 
Signed-off-by: zhao.xia <zhao.xia@verisilicon.com>
Signed-off-by: Kainan Cha <kainan.zha@verisilicon.com>
 2021-05-31 12:48:51 +08:00
Nightingale 9c60671031
Add map for UnMaxpool2d (#83) 
Signed-off-by: zhao.xia <zhao.xia@verisilicon.com>
 2021-05-28 17:09:26 +08:00
Kainan Cha 18a928ee69 Add Op MaxpoolWithArgmax 
Signed-off-by: Kainan Cha <kainan.zha@verisilicon.com>
 2021-05-27 18:59:35 +08:00
zhao.xia a1ba85691a Add map for LogSoftmax 
Signed-off-by: zhao.xia <zhao.xia@verisilicon.com>
 2021-05-26 11:37:16 +08:00
Kainan Cha 2ff1f5fed1 Update operation README 
Signed-off-by: Kainan Cha <kainan.zha@verisilicon.com>
 2021-05-25 13:52:56 +08:00
Nightingale f90f3eedfd
Add map for Resize1d (#69) 
Signed-off-by: zhao.xia <zhao.xia@verisilicon.com>
 2021-05-25 10:27:23 +08:00
Kainan Cha d0dadbc0fb Add support for FloorDiv 
Signed-off-by: Kainan Cha <kainan.zha@verisilicon.com>
 2021-05-25 01:20:43 +08:00
Nightingale 33fd1f0c58
Add map for DeConv1d (#62) 
Signed-off-by: zhao.xia <zhao.xia@verisilicon.com>
 2021-05-24 23:41:15 +08:00
zhao.xia be0a566042 Add map for Conv1D 
Convolution 1D operation, support float32, int8, int16, uint8.

Signed-off-by: zhao.xia <zhao.xia@verisilicon.com>
 2021-05-21 12:46:56 +08:00
zhao.xia 88f7141cfe Support LayerNormalization 
Layer normalization only support float32 data type.

Signed-off-by: zhao.xia <zhao.xia@verisilicon.com>
 2021-05-21 12:46:19 +08:00
zhao.xia b4b6a369a7 Add map for InstanceNormalization 
Currently instance normalization only support float32 data type.

Signed-off-by: zhao.xia <zhao.xia@verisilicon.com>
 2021-05-20 12:41:25 +08:00
Kainan Cha 7c0d2f59bb Update op README 
Signed-off-by: Kainan Cha <kainan.zha@verisilicon.com>
 2021-05-20 06:15:46 +08:00
Kainan Cha baea9b827f Add ANEURALNETWORKS API reference 
Signed-off-by: Kainan Cha <kainan.zha@verisilicon.com>
 2021-05-18 14:24:17 +08:00
Kainan Cha 7770a8fd91 Update Op README 
Signed-off-by: Kainan Cha <kainan.zha@verisilicon.com>
 2021-05-18 02:07:52 +08:00
Kainan Cha e05b6f7404 Update operation README with reference 
These links are for reference only, actually implementation
may vary in terms of dimensions and parameters supported.

Signed-off-by: Kainan Cha <kainan.zha@verisilicon.com>
 2021-05-18 01:58:08 +08:00
Kainan Cha 301d88a5a6 Add support for relational ops 
Signed-off-by: Kainan Cha <kainan.zha@verisilicon.com>
 2021-05-11 23:39:22 +08:00
Kainan Cha d92e08e502 Add support for Cast and Floor operation 
Signed-off-by: Kainan Cha <kainan.zha@verisilicon.com>
 2021-05-11 18:45:28 +08:00
Kainan Cha c2e10efb50 Add support for Reorg 
The Reorg implementation is that of YOLOv2.

Signed-off-by: Kainan Cha <kainan.zha@verisilicon.com>
 2021-05-11 10:57:56 +08:00
zhengzhouheng eff71c38bf add argmin and argmax op 2021-04-16 00:34:29 +08:00
yuenan.li c9d3416c6b Add the Squeeze op 
Signed-off-by: yuenan.li <yuenan.li@verisilicon.com>
 2021-04-15 11:22:48 +08:00
zhengzhouheng dc67e9ac63 add the Stack op 2021-04-07 19:57:28 +08:00
zhengzhouheng 07fc3b9914 add the clip, dropout, batchnorm op 2021-04-07 13:00:41 +08:00
Kainan Cha 90a52ea6c9 Add support for Mish, SoftRelu and HardSigmoid 
Signed-off-by: Kainan Cha <kainan.cha@verisilicon.com>
 2021-03-31 12:00:02 +08:00
Kainan Cha c569555f1f Use FCL2 instead of FCL which supports axis 
Signed-off-by: Kainan Cha <kainan.zha@verisilicon.com>
 2021-03-29 17:08:22 +08:00
yuenan.li 8f1c33ea83 add README.md for op support 
Signed-off-by: yuenan.li <yuenan.li@verisilicon.com>
 2021-03-16 11:46:57 +08:00