Zongwu.Yang
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aed3a48248
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Add layout inference and unit test for BatchNorm (#243)
Signed-off-by: Zongwu Yang <zongwu.yang@verisilicon.com>
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2021-12-22 09:47:57 +08:00 |
yuenan.li
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29f1efc492
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add API 'Clone' to tim_vx op and support default layout inference
Signed-off-by: yuenan.li <yuenan.li@verisilicon.com>
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2021-07-06 12:29:18 +08:00 |
jing.tang
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a85fe89cf6
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add docs for ops
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2021-05-21 18:39:59 +08:00 |
Kainan Cha
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2b29d5d41c
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Fix file permission
Signed-off-by: Kainan Cha <kainan.zha@verisilicon.com>
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2021-05-11 11:01:21 +08:00 |
zhengzhouheng
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07fc3b9914
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add the clip, dropout, batchnorm op
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2021-04-07 13:00:41 +08:00 |