1332 lines
40 KiB
C
1332 lines
40 KiB
C
/****************************************************************************
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*
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* Copyright (c) 2005 - 2023 by Vivante Corp. All rights reserved.
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*
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* The material in this file is confidential and contains trade secrets
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* of Vivante Corporation. This is proprietary information owned by
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* Vivante Corporation. No part of this work may be disclosed,
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* reproduced, copied, transmitted, or used in any way for any purpose,
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* without the express written permission of Vivante Corporation.
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*
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*****************************************************************************/
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#ifndef __gc_hal_driver_shared_h_
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#define __gc_hal_driver_shared_h_
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#include "gc_hal_enum_shared.h"
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#include "gc_hal_types_shared.h"
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#if defined(__QNXNTO__)
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#include <sys/siginfo.h>
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#endif
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* the DC instruction will cause segfault when disable writebufer and cache.*/
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#ifndef gcdSKIP_ARM_DC_INSTRUCTION
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#define gcdSKIP_ARM_DC_INSTRUCTION 0
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#endif
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/* The number of context buffers per user. */
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#if gcdCAPTURE_ONLY_MODE
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#define gcdCONTEXT_BUFFER_COUNT 1
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#else
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#define gcdCONTEXT_BUFFER_COUNT 2
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#endif
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#define gcdRENDER_FENCE_LENGTH (6 * gcmSIZEOF(gctUINT32))
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#define gcdBLT_FENCE_LENGTH (10 * gcmSIZEOF(gctUINT32))
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/******************************************************************************
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****************************** I/O Control Codes *****************************
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******************************************************************************/
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#define gcvHAL_CLASS "galcore"
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#define IOCTL_GCHAL_INTERFACE 30000
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#define IOCTL_GCHAL_PROFILER_INTERFACE 30001
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#define IOCTL_GCHAL_TERMINATE 30002
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/******************************************************************************
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***************************** Interface Structure ****************************
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******************************************************************************/
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#define gcdMAX_PROFILE_FILE_NAME 128
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#define gcdMAX_FLAT_MAPPING_COUNT 8
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/* gcvHAL_CHIP_INFO */
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typedef struct _gcsHAL_CHIP_INFO {
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/* Chip count. */
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OUT gctUINT16 count;
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/* Chip types. */
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OUT gctUINT8 types[gcdGLOBAL_CORE_COUNT];
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/* Chip IDs. */
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OUT gctUINT8 ids[gcdGLOBAL_CORE_COUNT];
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OUT gctUINT16 coreIndexs[gcdGLOBAL_CORE_COUNT];
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/* Hardware device ID. */
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OUT gctUINT8 hwDevIDs[gcdGLOBAL_CORE_COUNT];
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} gcsHAL_CHIP_INFO;
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/* gcvHAL_VERSION */
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typedef struct _gcsHAL_VERSION {
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/* version: <major>.<minor>.<patch>. */
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OUT gctINT32 major;
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OUT gctINT32 minor;
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OUT gctINT32 patch;
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/* Build version. */
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OUT gctUINT32 build;
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} gcsHAL_VERSION;
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/* gcvHAL_SET_TIMEOUT. */
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typedef struct _gcsHAL_SET_TIMEOUT {
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gctUINT32 timeOut;
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} gcsHAL_SET_TIMEOUT;
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/* gcvHAL_QUERY_VIDEO_MEMORY */
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typedef struct _gcsHAL_QUERY_VIDEO_MEMORY {
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/* Physical memory address of internal memory. Just a name. */
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OUT gctUINT32 internalPhysName;
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/* Size in bytes of internal memory. */
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OUT gctUINT64 internalSize;
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/* Physical memory address of external memory. Just a name. */
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OUT gctUINT32 externalPhysName;
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/* Size in bytes of external memory.*/
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OUT gctUINT64 externalSize;
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/* Physical memory address of contiguous memory. Just a name. */
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OUT gctUINT32 contiguousPhysName;
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/* Size in bytes of contiguous memory.*/
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OUT gctUINT64 contiguousSize;
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/* Physical memory address of exclusive memory. Just a name. */
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OUT gctUINT32 exclusivePhysName;
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/* Size in bytes of exclusive memory.*/
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OUT gctUINT64 exclusiveSize;
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/* If the virtual pool can be an available video memory pool. */
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OUT gctBOOL virtualPoolEnabled;
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} gcsHAL_QUERY_VIDEO_MEMORY;
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/* gcvHAL_QUERY_CHIP_IDENTITY */
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typedef struct _gcsHAL_QUERY_CHIP_IDENTITY *gcsHAL_QUERY_CHIP_IDENTITY_PTR;
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typedef struct _gcsHAL_QUERY_CHIP_IDENTITY {
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/* Chip model. */
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gceCHIPMODEL chipModel;
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/* Revision value.*/
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gctUINT32 chipRevision;
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/* Chip date. */
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gctUINT32 chipDate;
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/* Supported feature fields. */
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gctUINT32 chipFeatures;
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/* Supported minor feature fields. */
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gctUINT32 chipMinorFeatures;
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/* Supported minor feature 1 fields. */
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gctUINT32 chipMinorFeatures1;
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/* Supported minor feature 2 fields. */
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gctUINT32 chipMinorFeatures2;
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/* Supported minor feature 3 fields. */
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gctUINT32 chipMinorFeatures3;
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/* Supported minor feature 4 fields. */
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gctUINT32 chipMinorFeatures4;
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/* Supported minor feature 5 fields. */
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gctUINT32 chipMinorFeatures5;
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/* Supported minor feature 6 fields. */
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gctUINT32 chipMinorFeatures6;
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/* Number of streams supported. */
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gctUINT32 streamCount;
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/* Number of pixel pipes. */
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gctUINT32 pixelPipes;
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/* Number of resolve pipes. */
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gctUINT32 resolvePipes;
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/* Number of instructions. */
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gctUINT32 instructionCount;
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/* Number of PS instructions. */
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gctUINT32 PSInstructionCount;
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/* Number of constants. */
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gctUINT32 numConstants;
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/* Number of varyings */
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gctUINT32 varyingsCount;
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/* Number of 3D GPUs */
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gctUINT32 gpuCoreCount;
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/* Physical mask of all AVAILABLE clusters in core.*/
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gctUINT32 clusterAvailMask;
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/* Product ID */
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gctUINT32 productID;
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/* Special chip flag bits */
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gceCHIP_FLAG chipFlags;
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/* ECO ID. */
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gctUINT32 ecoID;
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/* Customer ID. */
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gctUINT32 customerID;
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/* CPU view physical address and size of SRAMs. */
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gctUINT64 sRAMBases[gcvSRAM_INTER_COUNT];
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gctUINT32 sRAMSizes[gcvSRAM_INTER_COUNT];
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gctUINT64 platformFlagBits;
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/* APB register offset. */
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gctUINT64 registerAPB;
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/* Enabled NN clusters number. */
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gctUINT32 nnClusterNum;
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/* Virtual address bits. */
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gctUINT32 virtualAddressBits;
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gctUINT32 chipConfig;
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} gcsHAL_QUERY_CHIP_IDENTITY;
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/* gcvHAL_QUERY_CHIP_OPTION. */
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typedef struct _gcsHAL_QUERY_CHIP_OPTIONS *gcsHAL_QUERY_CHIP_OPTIONS_PTR;
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typedef struct _gcsHAL_QUERY_CHIP_OPTIONS {
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gctBOOL gpuProfiler;
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gctBOOL allowFastClear;
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gctBOOL powerManagement;
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/*
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* Whether use new MMU. It is meaningless
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* for old MMU since old MMU is always enabled.
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*/
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gctBOOL enableMMU;
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gceCOMPRESSION_OPTION allowCompression;
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gctBOOL smallBatch;
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gctUINT32 uscL1CacheRatio;
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gctUINT32 uscAttribCacheRatio;
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gctUINT32 userClusterMask;
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gctUINT32 userClusterMasks[gcdMAX_MAJOR_CORE_COUNT];
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/* Internal SRAM. */
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gctADDRESS sRAMGPUVirtAddrs[gcvSRAM_INTER_COUNT];
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gctUINT32 sRAMSizes[gcvSRAM_INTER_COUNT];
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gctUINT32 sRAMCount;
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/* External SRAM. */
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gctPHYS_ADDR_T extSRAMCPUPhysAddrs[gcvSRAM_EXT_COUNT];
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gctPHYS_ADDR_T extSRAMGPUPhysAddrs[gcvSRAM_EXT_COUNT];
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gctADDRESS extSRAMGPUVirtAddrs[gcvSRAM_EXT_COUNT];
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gctUINT32 extSRAMGPUPhysNames[gcvSRAM_EXT_COUNT];
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gctUINT32 extSRAMSizes[gcvSRAM_EXT_COUNT];
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gctUINT32 extSRAMCount;
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gceSECURE_MODE secureMode;
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gctBOOL hasShader;
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/* NN clusters power control. */
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gctUINT32 enableNNClusters;
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gctUINT32 configNNPowerControl;
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/* Active NN core count. */
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gctUINT32 activeNNCoreCount;
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/* Only represents system reserved memory pool currently. */
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gctUINT32 vidMemCount;
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} gcsHAL_QUERY_CHIP_OPTIONS;
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/* gcvHAL_QUERY_CHIP_FREQUENCY. */
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typedef struct _gcsHAL_QUERY_CHIP_FREQUENCY *gcsHAL_QUERY_CHIP_FREQUENCY_PTR;
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typedef struct _gcsHAL_QUERY_CHIP_FREQUENCY {
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OUT gctUINT64 mcClk;
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OUT gctUINT64 shClk;
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} gcsHAL_QUERY_CHIP_FREQUENCY;
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/* Obsolete for userpace. */
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/* gcvHAL_ALLOCATE_NON_PAGED_MEMORY */
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typedef struct _gcsHAL_ALLOCATE_NON_PAGED_MEMORY {
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/* Allocation flags. */
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IN gctUINT32 flags;
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/* Number of bytes to allocate. */
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IN OUT gctUINT64 bytes;
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/* Physical address of allocation. Just a name. */
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OUT gctUINT32 physName;
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/* Logical address of allocation. */
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OUT gctUINT64 logical;
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} gcsHAL_ALLOCATE_NON_PAGED_MEMORY;
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/* Obsolete for userpace. */
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/* gcvHAL_FREE_NON_PAGED_MEMORY */
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typedef struct _gcsHAL_FREE_NON_PAGED_MEMORY {
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/* Number of bytes allocated. */
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IN gctUINT64 bytes;
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/* Physical address of allocation. Just a name. */
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IN gctUINT32 physName;
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/* Logical address of allocation. */
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IN gctUINT64 logical;
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} gcsHAL_FREE_NON_PAGED_MEMORY;
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/* Video memory allocation. */
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/* gcvHAL_ALLOCATE_LINEAR_VIDEO_MEMORY */
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typedef struct _gcsHAL_ALLOCATE_LINEAR_VIDEO_MEMORY {
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/* Number of bytes to allocate. */
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IN OUT gctUINT64 bytes;
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/* Buffer alignment. */
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IN gctUINT32 alignment;
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/* Type of allocation, see gceVIDMEM_TYPE. */
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IN gctUINT32 type;
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/* Flag of allocation. */
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IN gctUINT32 flag;
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/* Memory pool to allocate from. */
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IN OUT gctUINT32 pool;
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/* Internal SRAM index. */
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IN gctINT32 sRAMIndex;
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/* External SRAM index. */
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IN gctINT32 extSRAMIndex;
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/* Allocated video memory. */
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OUT gctUINT32 node;
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/* Video memory index, only represents system reserved memroy pool currently. */
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IN gctINT32 vidMemIndex;
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} gcsHAL_ALLOCATE_LINEAR_VIDEO_MEMORY;
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typedef struct _gcsUSER_MEMORY_DESC {
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/* Import flag. */
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gctUINT32 flag;
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/* gcvALLOC_FLAG_DMABUF */
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gctUINT32 handle;
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gctUINT64 dmabuf;
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/* gcvALLOC_FLAG_USERMEMORY */
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gctUINT64 logical;
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gctUINT64 physical;
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gctUINT64 size;
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} gcsUSER_MEMORY_DESC;
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/* gcvHAL_WRAP_USER_MEMORY. */
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typedef struct _gcsHAL_WRAP_USER_MEMORY {
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/* Description of user memory. */
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IN gcsUSER_MEMORY_DESC desc;
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/* Video memory allocation type. */
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IN gctUINT32 type;
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/* Output video mmory node. */
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OUT gctUINT32 node;
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/* size of the node in bytes */
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OUT gctUINT64 bytes;
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} gcsHAL_WRAP_USER_MEMORY;
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/* gcvHAL_RELEASE_VIDEO_MEMORY */
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typedef struct _gcsHAL_RELEASE_VIDEO_MEMORY {
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/* Allocated video memory. */
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IN gctUINT32 node;
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#ifdef __QNXNTO__
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/* Mapped logical address to unmap in user space. */
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OUT gctUINT64 memory;
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/* Number of bytes to allocated. */
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OUT gctUINT64 bytes;
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#endif
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} gcsHAL_RELEASE_VIDEO_MEMORY;
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/* gcvHAL_LOCK_VIDEO_MEMORY */
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typedef struct _gcsHAL_LOCK_VIDEO_MEMORY {
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/* Allocated video memory. */
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IN gctUINT32 node;
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/* Cache configuration. */
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/* Only gcvPOOL_VIRTUAL can be configured */
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IN gctBOOL cacheable;
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/* Hardware specific address. */
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OUT gctADDRESS address;
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/* Mapped logical address. */
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OUT gctUINT64 memory;
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/* Customer priviate handle*/
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OUT gctUINT32 gid;
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/* Bus address of a contiguous video node. */
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OUT gctUINT64 physicalAddress;
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#if gcdCAPTURE_ONLY_MODE
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IN gctBOOL queryCapSize;
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IN gctPOINTER captureLogical;
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OUT gctUINT64 captureSize;
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#endif
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IN gceLOCK_VIDEO_MEMORY_OP op;
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} gcsHAL_LOCK_VIDEO_MEMORY;
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/* gcvHAL_UNLOCK_VIDEO_MEMORY */
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typedef struct _gcsHAL_UNLOCK_VIDEO_MEMORY {
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/* Allocated video memory. */
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IN gctUINT64 node;
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/* Video memory allocation type. */
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IN gctUINT32 type;
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/* Pool of the unlock node */
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OUT gctUINT32 pool;
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/* Bytes of the unlock node */
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OUT gctUINT64 bytes;
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/* Flag to unlock surface asynchroneously. */
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IN OUT gctBOOL asynchroneous;
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#if gcdCAPTURE_ONLY_MODE
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OUT gctPOINTER captureLogical;
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#endif
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IN gceLOCK_VIDEO_MEMORY_OP op;
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IN gctUINT64 mmu;
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} gcsHAL_UNLOCK_VIDEO_MEMORY;
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/* gcvHAL_BOTTOM_HALF_UNLOCK_VIDEO_MEMORY: */
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typedef struct _gcsHAL_BOTTOM_HALF_UNLOCK_VIDEO_MEMORY {
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/* Allocated video memory. */
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IN gctUINT32 node;
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/* Video memory allocation type. */
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IN gctUINT32 type;
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} gcsHAL_BOTTOM_HALF_UNLOCK_VIDEO_MEMORY;
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/* gcvHAL_EXPORT_VIDEO_MEMORY. */
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typedef struct _gcsHAL_EXPORT_VIDEO_MEMORY {
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/* Allocated video memory. */
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IN gctUINT32 node;
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/* Export flags */
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IN gctUINT32 flags;
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/* Exported dma_buf fd */
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OUT gctINT32 fd;
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} gcsHAL_EXPORT_VIDEO_MEMORY;
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/* gcvHAL_NAME_VIDEO_MEMORY. */
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typedef struct _gcsHAL_NAME_VIDEO_MEMORY {
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IN gctUINT32 handle;
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OUT gctUINT32 name;
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} gcsHAL_NAME_VIDEO_MEMORY;
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/* gcvHAL_IMPORT_VIDEO_MEMORY. */
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typedef struct _gcsHAL_IMPORT_VIDEO_MEMORY {
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IN gctUINT32 name;
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OUT gctUINT32 handle;
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} gcsHAL_IMPORT_VIDEO_MEMORY;
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/* gcvHAL_MAP_MEMORY */
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typedef struct _gcsHAL_MAP_MEMORY {
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/* Physical memory address to map. Just a name on Linux/Qnx. */
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IN gctUINT32 physName;
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/* Number of bytes in physical memory to map. */
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IN gctUINT64 bytes;
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/* Address of mapped memory. */
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OUT gctUINT64 logical;
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} gcsHAL_MAP_MEMORY;
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/* gcvHAL_UNMAP_MEMORY */
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typedef struct _gcsHAL_UNMAP_MEMORY {
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/* Physical memory address to unmap. Just a name on Linux/Qnx. */
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IN gctUINT32 physName;
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/* Number of bytes in physical memory to unmap. */
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IN gctUINT64 bytes;
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/* Address of mapped memory to unmap. */
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IN gctUINT64 logical;
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} gcsHAL_UNMAP_MEMORY;
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/* gcvHAL_CACHE */
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typedef struct _gcsHAL_CACHE {
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IN gceCACHEOPERATION operation;
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IN gctUINT64 process;
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IN gctUINT64 logical;
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IN gctUINT64 bytes;
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IN gctUINT32 node;
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IN gctUINT64 offset;
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} gcsHAL_CACHE;
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/* gcvHAL_ATTACH */
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typedef struct _gcsHAL_ATTACH {
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/* Handle of context buffer object. */
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OUT gctUINT32 context;
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/* Maximum state in the buffer. */
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OUT gctUINT64 maxState;
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/* Number of states in the buffer. */
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OUT gctUINT32 numStates;
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/* Map context buffer to user or not. */
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IN gctBOOL map;
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/* Physical of context buffer. */
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OUT gctUINT64 logicals[2];
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/* Bytes of context buffer. */
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OUT gctUINT32 bytes;
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/* The context is for multi-core or not. */
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IN gctBOOL shared;
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#if gcdCAPTURE_ONLY_MODE
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IN gctBOOL queryCapSize;
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IN gctPOINTER contextLogical[gcdCONTEXT_BUFFER_COUNT];
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OUT gctUINT64 captureSize;
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#endif
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} gcsHAL_ATTACH;
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/* gcvHAL_DETACH */
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typedef struct _gcsHAL_DETACH {
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/* Context buffer object gckCONTEXT. Just a name. */
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IN gctUINT32 context;
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} gcsHAL_DETACH;
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/* gcvHAL_EVENT_COMMIT. */
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typedef struct _gcsHAL_EVENT_COMMIT {
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/* Event queue in gcsQUEUE. */
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IN gctUINT64 queue;
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/* Brother cores in user device of current commit process. */
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IN gctUINT32 broCoreMask;
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IN gctBOOL shared;
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#if gcdENABLE_SW_PREEMPTION
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/* Priority ID. */
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IN gctUINT32 priorityID;
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/* Does it require top priority? */
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IN gctBOOL topPriority;
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#endif
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} gcsHAL_EVENT_COMMIT;
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typedef struct _gcsHAL_COMMAND_LOCATION {
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gctUINT32 priority;
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gctUINT32 channelId;
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gctUINT32 videoMemNode;
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gctADDRESS address;
|
|
gctUINT64 logical;
|
|
gctUINT32 startOffset;
|
|
/* size includes reservedHead and reservedTail. */
|
|
gctUINT32 size;
|
|
|
|
gctUINT32 reservedHead;
|
|
gctUINT32 reservedTail;
|
|
|
|
/* Pointer to patch list. */
|
|
gctUINT64 patchHead;
|
|
|
|
/*
|
|
* Location index of exit commands, ie where to put the chipEnable/link back
|
|
* commands in the reservedTail area.
|
|
* It's used in fully shared command buffer for multiple cores.
|
|
*/
|
|
gctUINT32 exitIndex;
|
|
gctUINT32 entryPipe;
|
|
gctUINT32 exitPipe;
|
|
|
|
/* struct _gcsHAL_COMMAND_LOCATION * next; */
|
|
gctUINT64 next;
|
|
#if gcdCAPTURE_ONLY_MODE
|
|
gctPOINTER contextLogical[gcdCONTEXT_BUFFER_COUNT];
|
|
#endif
|
|
} gcsHAL_COMMAND_LOCATION;
|
|
|
|
typedef struct _gcsHAL_SUBCOMMIT {
|
|
gctUINT32 coreId;
|
|
|
|
/* user gcsSTATE_DELTA_PTR. */
|
|
gctUINT64 delta;
|
|
|
|
/* Kernel gckCONTEXT. */
|
|
gctUINT64 context;
|
|
|
|
/* Event queue in user gcsQUEUE *. */
|
|
gctUINT64 queue;
|
|
|
|
/* Locate the commands. */
|
|
gcsHAL_COMMAND_LOCATION commandBuffer;
|
|
|
|
/* struct _gcsHAL_SUBCOMMIT * next; */
|
|
gctUINT64 next;
|
|
|
|
#if gcdENABLE_SW_PREEMPTION
|
|
/* Process ID. */
|
|
gctUINT32 pid;
|
|
|
|
/* Engine type. */
|
|
gceENGINE engine;
|
|
|
|
/* Is it multi-core and shared mode?. */
|
|
gctBOOL shared;
|
|
|
|
/* Priority ID. */
|
|
gctUINT32 priorityID;
|
|
|
|
/* Does it require top priority. */
|
|
gctBOOL topPriority;
|
|
#endif
|
|
} gcsHAL_SUBCOMMIT, *gcsHAL_SUBCOMMIT_PTR;
|
|
|
|
/* gcvHAL_COMMIT */
|
|
typedef struct _gcsHAL_COMMIT {
|
|
gcsHAL_SUBCOMMIT subCommit;
|
|
|
|
gctBOOL shared;
|
|
|
|
gctBOOL contextSwitched;
|
|
|
|
/* Commit stamp of this commit. */
|
|
OUT gctUINT64 commitStamp;
|
|
|
|
/* Brother cores in user device of current commit process. */
|
|
gctUINT32 broCoreMask;
|
|
|
|
#if gcdENABLE_MP_SWITCH
|
|
/* Multi-processor mode. */
|
|
gctUINT32 mpMode;
|
|
|
|
/* Switch multi-processor mode. */
|
|
gctUINT32 switchMpMode;
|
|
#endif
|
|
|
|
#if gcdENABLE_SW_PREEMPTION
|
|
/* If user need to merge the delta. */
|
|
gctBOOL needMerge;
|
|
|
|
/* If this commit is pending. */
|
|
gctBOOL pending;
|
|
#endif
|
|
} gcsHAL_COMMIT;
|
|
|
|
|
|
typedef struct _gcsHAL_COMMIT_DONE {
|
|
IN gctUINT64 context;
|
|
|
|
#if gcdENABLE_SW_PREEMPTION
|
|
/* Priority ID. */
|
|
IN gctUINT32 priorityID;
|
|
#endif
|
|
} gcsHAL_COMMIT_DONE;
|
|
|
|
/* gcvHAL_USER_SIGNAL */
|
|
typedef struct _gcsHAL_USER_SIGNAL {
|
|
/* Command. */
|
|
gceUSER_SIGNAL_COMMAND_CODES command;
|
|
|
|
/* Signal ID. */
|
|
IN OUT gctINT32 id;
|
|
|
|
/* Reset mode. */
|
|
IN gctBOOL manualReset;
|
|
|
|
/* Wait timedout. */
|
|
IN gctUINT32 wait;
|
|
|
|
/* State. */
|
|
IN gctBOOL state;
|
|
|
|
/* Return status */
|
|
IN gceSIGNAL_STATUS status;
|
|
} gcsHAL_USER_SIGNAL;
|
|
|
|
/* gcvHAL_SIGNAL. */
|
|
typedef struct _gcsHAL_SIGNAL {
|
|
/* Signal handle to signal gctSIGNAL. */
|
|
IN gctUINT64 signal;
|
|
|
|
/* Reserved gctSIGNAL. */
|
|
IN gctUINT64 auxSignal;
|
|
|
|
/* Process owning the signal gctHANDLE. */
|
|
IN gctUINT64 process;
|
|
|
|
#if defined(__QNXNTO__)
|
|
/* Client pulse event. */
|
|
IN struct sigevent event;
|
|
|
|
/* Set by server. */
|
|
IN gctINT32 rcvid;
|
|
#endif
|
|
/* Event generated from where of pipeline */
|
|
IN gceKERNEL_WHERE fromWhere;
|
|
|
|
#if gcdENABLE_SW_PREEMPTION
|
|
/* If it is a fence signal. */
|
|
IN gctBOOL fenceSignal;
|
|
#endif
|
|
} gcsHAL_SIGNAL;
|
|
|
|
/* gcvHAL_WRITE_DATA. */
|
|
typedef struct _gcsHAL_WRITE_DATA {
|
|
/* Address to write data to. */
|
|
IN gctUINT32 address;
|
|
|
|
/* Data to write. */
|
|
IN gctUINT32 data;
|
|
} gcsHAL_WRITE_DATA;
|
|
|
|
/* gcvHAL_READ_REGISTER */
|
|
typedef struct _gcsHAL_READ_REGISTER {
|
|
/* Logical address of memory to write data to. */
|
|
IN gctUINT32 address;
|
|
|
|
/* Data read. */
|
|
OUT gctUINT32 data;
|
|
} gcsHAL_READ_REGISTER;
|
|
|
|
/* gcvHAL_WRITE_REGISTER */
|
|
typedef struct _gcsHAL_WRITE_REGISTER {
|
|
/* Logical address of memory to write data to. */
|
|
IN gctUINT32 address;
|
|
|
|
/* Data read. */
|
|
IN gctUINT32 data;
|
|
} gcsHAL_WRITE_REGISTER;
|
|
|
|
/* gcvHAL_READ_REGISTER_EX */
|
|
typedef struct _gcsHAL_READ_REGISTER_EX {
|
|
/* Logical address of memory to write data to. */
|
|
IN gctUINT32 address;
|
|
|
|
IN gctUINT32 coreSelect;
|
|
|
|
/* Data read. */
|
|
OUT gctUINT32 data[4];
|
|
} gcsHAL_READ_REGISTER_EX;
|
|
|
|
/* gcvHAL_WRITE_REGISTER_EX */
|
|
typedef struct _gcsHAL_WRITE_REGISTER_EX {
|
|
/* Logical address of memory to write data to. */
|
|
IN gctUINT32 address;
|
|
|
|
IN gctUINT32 coreSelect;
|
|
|
|
/* Data read. */
|
|
IN gctUINT32 data[4];
|
|
} gcsHAL_WRITE_REGISTER_EX;
|
|
|
|
/* gcvHAL_APB_AXIFEE_ACCESS */
|
|
typedef struct _gcsHAL_APB_AXIFE_ACCESS {
|
|
/* Logical address of memory to write data to. */
|
|
IN gctUINT32 address;
|
|
|
|
IN gctUINT32 coreSelect;
|
|
|
|
IN gctBOOL isRead;
|
|
|
|
/* Data read. */
|
|
IN gctUINT32 data;
|
|
} gcsHAL_APB_AXIFE_ACCESS;
|
|
|
|
#if VIVANTE_PROFILER
|
|
/* gcvHAL_GET_PROFILE_SETTING */
|
|
typedef struct _gcsHAL_GET_PROFILE_SETTING {
|
|
/* Enable profiling */
|
|
OUT gctBOOL enable;
|
|
/* Profile mode */
|
|
OUT gceProfilerMode profileMode;
|
|
/* Probe mode */
|
|
OUT gceProbeMode probeMode;
|
|
} gcsHAL_GET_PROFILE_SETTING;
|
|
|
|
/* gcvHAL_SET_PROFILE_SETTING */
|
|
typedef struct _gcsHAL_SET_PROFILE_SETTING {
|
|
/* Enable profiling */
|
|
IN gctBOOL enable;
|
|
/* Profile mode */
|
|
IN gceProfilerMode profileMode;
|
|
/* Probe mode */
|
|
IN gceProbeMode probeMode;
|
|
} gcsHAL_SET_PROFILE_SETTING;
|
|
|
|
/* gcvHAL_READ_PROFILER_REGISTER_SETTING */
|
|
typedef struct _gcsHAL_READ_PROFILER_REGISTER_SETTING {
|
|
/*Should Clear Register*/
|
|
IN gctBOOL bclear;
|
|
} gcsHAL_READ_PROFILER_REGISTER_SETTING;
|
|
|
|
typedef struct _gcsHAL_READ_ALL_PROFILE_REGISTERS_PART1 {
|
|
/* Context buffer object gckCONTEXT. Just a name. */
|
|
IN gctUINT32 context;
|
|
|
|
/* Data read. */
|
|
OUT gcsPROFILER_COUNTERS_PART1 Counters;
|
|
} gcsHAL_READ_ALL_PROFILE_REGISTERS_PART1;
|
|
|
|
typedef struct _gcsHAL_READ_ALL_PROFILE_REGISTERS_PART2 {
|
|
/* Context buffer object gckCONTEXT. Just a name. */
|
|
IN gctUINT32 context;
|
|
|
|
/* Data read. */
|
|
OUT gcsPROFILER_COUNTERS_PART2 Counters;
|
|
} gcsHAL_READ_ALL_PROFILE_REGISTERS_PART2;
|
|
|
|
/* gcvHAL_PROFILE_REGISTERS_2D */
|
|
typedef struct _gcsHAL_PROFILE_REGISTERS_2D {
|
|
/* Data read in gcs2D_PROFILE. */
|
|
OUT gctUINT64 hwProfile2D;
|
|
} gcsHAL_PROFILE_REGISTERS_2D;
|
|
#endif
|
|
|
|
/* gcvHAL_SET_POWER_MANAGEMENT_STATE */
|
|
typedef struct _gcsHAL_SET_POWER_MANAGEMENT {
|
|
/* Data read. */
|
|
IN gceCHIPPOWERSTATE state;
|
|
} gcsHAL_SET_POWER_MANAGEMENT;
|
|
|
|
/* gcvHAL_QUERY_POWER_MANAGEMENT_STATE */
|
|
typedef struct _gcsHAL_QUERY_POWER_MANAGEMENT {
|
|
/* Data read. */
|
|
OUT gceCHIPPOWERSTATE state;
|
|
|
|
/* Idle query. */
|
|
OUT gctBOOL isIdle;
|
|
} gcsHAL_QUERY_POWER_MANAGEMENT;
|
|
|
|
/* gcvHAL_CONFIG_POWER_MANAGEMENT. */
|
|
typedef struct _gcsHAL_CONFIG_POWER_MANAGEMENT {
|
|
IN gctBOOL enable;
|
|
OUT gctBOOL oldValue;
|
|
} gcsHAL_CONFIG_POWER_MANAGEMENT;
|
|
|
|
typedef struct _gcsFLAT_MAPPING_RANGE {
|
|
gctUINT64 start;
|
|
gctUINT64 end;
|
|
gctUINT64 size;
|
|
gceFLATMAP_FLAG flag;
|
|
|
|
/* Corresponding virtual start. */
|
|
gctUINT64 vStart;
|
|
} gcsFLAT_MAPPING_RANGE;
|
|
|
|
/* gcvHAL_GET_BASE_ADDRESS */
|
|
typedef struct _gcsHAL_GET_BASE_ADDRESS {
|
|
/* Physical memory address of internal memory. */
|
|
OUT gctUINT32 baseAddress;
|
|
|
|
OUT gctUINT32 flatMappingRangeCount;
|
|
|
|
OUT gcsFLAT_MAPPING_RANGE flatMappingRanges[gcdMAX_FLAT_MAPPING_COUNT];
|
|
} gcsHAL_GET_BASE_ADDRESS;
|
|
|
|
typedef struct _gcsHAL_SET_DEBUG_LEVEL_ZONE {
|
|
IN gctUINT32 level;
|
|
IN gctUINT32 zones;
|
|
IN gctBOOL enable;
|
|
} gcsHAL_SET_DEBUG_LEVEL_ZONE;
|
|
|
|
typedef struct _gcsHAL_QUERY_CPU_FREQUENCY
|
|
{
|
|
IN gctUINT32 CPUId;
|
|
OUT gctUINT32 CPUFrequency;
|
|
} gcsHAL_QUERY_CPU_FREQUENCY;
|
|
|
|
/* gcvHAL_DEBUG_DUMP. */
|
|
typedef struct _gcsHAL_DEBUG_DUMP {
|
|
/* gceDUMP_BUFFER_TYPE type. */
|
|
IN gctUINT32 type;
|
|
|
|
IN gctUINT64 ptr;
|
|
IN gctADDRESS address;
|
|
IN gctUINT32 size;
|
|
} gcsHAL_DEBUG_DUMP;
|
|
|
|
|
|
/* gcvHAL_TIMESTAMP */
|
|
typedef struct _gcsHAL_TIMESTAMP {
|
|
/* Timer select. */
|
|
IN gctUINT32 timer;
|
|
|
|
/* Timer request type (0-stop, 1-start, 2-send delta). */
|
|
IN gctUINT32 request;
|
|
|
|
/* Result of delta time in microseconds. */
|
|
OUT gctINT32 timeDelta;
|
|
} gcsHAL_TIMESTAMP;
|
|
|
|
/* gcvHAL_DATABASE */
|
|
typedef struct _gcsHAL_DATABASE {
|
|
/*
|
|
* Set to gcvTRUE if you want to query a particular process ID.
|
|
* Set to gcvFALSE to query the last detached process.
|
|
*/
|
|
IN gctBOOL validProcessID;
|
|
|
|
/* Process ID to query. */
|
|
IN gctUINT32 processID;
|
|
|
|
/* Information. */
|
|
OUT gcuDATABASE_INFO vidMem;
|
|
OUT gcuDATABASE_INFO nonPaged;
|
|
OUT gcuDATABASE_INFO contiguous;
|
|
OUT gcuDATABASE_INFO gpuIdle;
|
|
|
|
/* Detail information about video memory. */
|
|
OUT gcuDATABASE_INFO vidMemPool[3];
|
|
} gcsHAL_DATABASE;
|
|
|
|
/* gcvHAL_GET_FRAME_INFO. */
|
|
typedef struct _gcsHAL_GET_FRAME_INFO {
|
|
/* gcsHAL_FRAME_INFO* */
|
|
OUT gctUINT64 frameInfo;
|
|
} gcsHAL_GET_FRAME_INFO;
|
|
|
|
|
|
typedef struct _gcsHAL_SET_FSCALE_VALUE {
|
|
IN gctUINT32 value;
|
|
IN gctUINT32 shValue;
|
|
} gcsHAL_SET_FSCALE_VALUE;
|
|
|
|
typedef struct _gcsHAL_GET_FSCALE_VALUE {
|
|
OUT gctUINT32 value;
|
|
OUT gctUINT32 minValue;
|
|
OUT gctUINT32 maxValue;
|
|
} gcsHAL_GET_FSCALE_VALUE;
|
|
|
|
/* gcvHAL_QUERY_RESET_TIME_STAMP. */
|
|
typedef struct _gcsHAL_QUERY_RESET_TIME_STAMP {
|
|
OUT gctUINT64 timeStamp;
|
|
OUT gctUINT64 contextID;
|
|
} gcsHAL_QUERY_RESET_TIME_STAMP;
|
|
|
|
/* gcvHAL_CREATE_NATIVE_FENCE. */
|
|
typedef struct _gcsHAL_CREATE_NATIVE_FENCE {
|
|
/* Signal id. */
|
|
IN gctUINT64 signal;
|
|
|
|
/* Native fence file descriptor. */
|
|
OUT gctINT32 fenceFD;
|
|
|
|
} gcsHAL_CREATE_NATIVE_FENCE;
|
|
|
|
/* gcvHAL_WAIT_NATIVE_FENCE. */
|
|
typedef struct _gcsHAL_WAIT_NATIVE_FENCE {
|
|
/* Native fence file descriptor. */
|
|
IN gctINT32 fenceFD;
|
|
|
|
/* Wait timeout. */
|
|
IN gctUINT32 timeout;
|
|
} gcsHAL_WAIT_NATIVE_FENCE;
|
|
|
|
/* gcvHAL_SHBUF. */
|
|
typedef struct _gcsHAL_SHBUF {
|
|
gceSHBUF_COMMAND_CODES command;
|
|
|
|
/* Shared buffer. */
|
|
IN OUT gctUINT64 id;
|
|
|
|
/* User data to be shared. */
|
|
IN gctUINT64 data;
|
|
|
|
/* Data size. */
|
|
IN OUT gctUINT32 bytes;
|
|
} gcsHAL_SHBUF;
|
|
|
|
/* gcvHAL_GET_GRAPHIC_BUFFER_FD. */
|
|
/*
|
|
* Fd representation of android graphic buffer contents.
|
|
* Currently, it is only to reference video nodes, signal, etc to avoid being
|
|
* destroyed when trasfering across processes.
|
|
*/
|
|
typedef struct _gcsHAL_GET_GRAPHIC_BUFFER_FD {
|
|
/* Max 3 video nodes, node handle here. */
|
|
IN gctUINT32 node[3];
|
|
|
|
/* A shBuf. */
|
|
IN gctUINT64 shBuf;
|
|
|
|
/* A signal. */
|
|
IN gctUINT64 signal;
|
|
|
|
OUT gctINT32 fd;
|
|
} gcsHAL_GET_GRAPHIC_BUFFER_FD;
|
|
|
|
typedef struct _gcsHAL_VIDEO_MEMORY_METADATA {
|
|
/* Allocated video memory. */
|
|
IN gctUINT32 node;
|
|
|
|
IN gctUINT32 readback;
|
|
|
|
INOUT gctINT32 ts_fd;
|
|
INOUT gctUINT32 fc_enabled;
|
|
INOUT gctUINT32 fc_value;
|
|
INOUT gctUINT32 fc_value_upper;
|
|
|
|
INOUT gctUINT32 compressed;
|
|
INOUT gctUINT32 compress_format;
|
|
} gcsHAL_VIDEO_MEMORY_METADATA;
|
|
|
|
/* gcvHAL_GET_VIDEO_MEMORY_FD. */
|
|
typedef struct _gcsHAL_GET_VIDEO_MEMORY_FD {
|
|
IN gctUINT32 handle;
|
|
IN gctBOOL exported;
|
|
OUT gctINT32 fd;
|
|
} gcsHAL_GET_VIDEO_MEMORY_FD;
|
|
|
|
/* gcvHAL_DESTROY_MMU. */
|
|
typedef struct _gcsHAL_DESTROY_MMU {
|
|
/* Mmu object. */
|
|
IN gctUINT64 mmu;
|
|
IN gctUINT64 database;
|
|
IN gctUINT32 pid;
|
|
} gcsHAL_DESTROY_MMU;
|
|
|
|
/* gcvHAL_WAIT_FENCE. */
|
|
typedef struct _gcsHAL_WAIT_FENCE {
|
|
IN gctUINT32 handle;
|
|
IN gctUINT32 timeOut;
|
|
} gcsHAL_WAIT_FENCE;
|
|
|
|
/* gcvHAL_DEVICE_MUTEX: */
|
|
typedef struct _gcsHAL_DEVICE_MUTEX {
|
|
/* Lock or Release device mutex. */
|
|
gctBOOL isMutexLocked;
|
|
} gcsHAL_DEVICE_MUTEX;
|
|
|
|
|
|
#if gcdDEC_ENABLE_AHB
|
|
/* gcvHAL_DEC300_READ. */
|
|
typedef struct _gcsHAL_DEC300_READ {
|
|
gctUINT32 enable;
|
|
gctUINT32 readId;
|
|
gctUINT32 format;
|
|
gctUINT32 strides[3];
|
|
gctUINT32 is3D;
|
|
gctUINT32 isMSAA;
|
|
gctUINT32 clearValue;
|
|
gctUINT32 isTPC;
|
|
gctUINT32 isTPCCompressed;
|
|
gctUINT32 surfAddrs[3];
|
|
gctUINT32 tileAddrs[3];
|
|
} DEC300Read;
|
|
|
|
/* gcvHAL_DEC300_WRITE. */
|
|
typedef struct _gcsHAL_DEC300_WRITE {
|
|
gctUINT32 enable;
|
|
gctUINT32 readId;
|
|
gctUINT32 writeId;
|
|
gctUINT32 format;
|
|
gctUINT32 surfAddr;
|
|
gctUINT32 tileAddr;
|
|
} DEC300Write;
|
|
|
|
/* gcvHAL_DEC300_FLUSH. */
|
|
typedef struct _gcsHAL_DEC300_FLUSH {
|
|
IN gctUINT8 useless;
|
|
} DEC300Flush;
|
|
|
|
/* gcvHAL_DEC300_FLUSH_WAIT. */
|
|
typedef struct _gcsHAL_DEC300_FLUSH_WAIT {
|
|
IN gctUINT32 done;
|
|
} DEC300FlushWait;
|
|
#endif
|
|
|
|
#if gcdENABLE_VIDEO_MEMORY_MIRROR
|
|
typedef struct _gcsHAL_SYNC_VIDEO_MEMORY {
|
|
IN gctUINT64 node;
|
|
IN gceSYNC_MEMORY_DIRECTION dir;
|
|
} gcsHAL_SYNC_VIDEO_MEMORY;
|
|
#endif
|
|
|
|
#if gcdENABLE_CLEAR_FENCE
|
|
typedef struct _gcsHAL_STORE_CLEAR_FENCE {
|
|
gctADDRESS address;
|
|
gctUINT64 fenceValue;
|
|
gctUINT64 recordId;
|
|
gctBOOL use64BitFence;
|
|
gctBOOL isClear;
|
|
} gcsHAL_STORE_CLEAR_FENCE;
|
|
#endif
|
|
|
|
typedef struct _gcsHAL_INTERFACE {
|
|
/* Command code. */
|
|
gceHAL_COMMAND_CODES command;
|
|
|
|
/* Hardware type. */
|
|
gceHARDWARE_TYPE hardwareType;
|
|
|
|
/* Core index for current hardware type. */
|
|
gctUINT32 coreIndex;
|
|
|
|
/* Status value. */
|
|
gceSTATUS status;
|
|
|
|
/* Engine */
|
|
gceENGINE engine;
|
|
|
|
/* Ignore information from TSL when doing IO control */
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|
gctBOOL ignoreTLS;
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|
|
|
/* The mutext already acquired */
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|
IN gctBOOL commitMutex;
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|
|
|
/* Union of command structures. */
|
|
union _u {
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|
gcsHAL_CHIP_INFO ChipInfo;
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|
gcsHAL_VERSION Version;
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|
gcsHAL_SET_TIMEOUT SetTimeOut;
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|
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gcsHAL_QUERY_VIDEO_MEMORY QueryVideoMemory;
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gcsHAL_QUERY_CHIP_IDENTITY QueryChipIdentity;
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|
gcsHAL_QUERY_CHIP_OPTIONS QueryChipOptions;
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|
gcsHAL_QUERY_CHIP_FREQUENCY QueryChipFrequency;
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|
|
|
gcsHAL_ALLOCATE_NON_PAGED_MEMORY AllocateNonPagedMemory;
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|
gcsHAL_FREE_NON_PAGED_MEMORY FreeNonPagedMemory;
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|
|
|
gcsHAL_ALLOCATE_LINEAR_VIDEO_MEMORY AllocateLinearVideoMemory;
|
|
gcsHAL_WRAP_USER_MEMORY WrapUserMemory;
|
|
gcsHAL_RELEASE_VIDEO_MEMORY ReleaseVideoMemory;
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|
|
|
gcsHAL_LOCK_VIDEO_MEMORY LockVideoMemory;
|
|
gcsHAL_UNLOCK_VIDEO_MEMORY UnlockVideoMemory;
|
|
gcsHAL_BOTTOM_HALF_UNLOCK_VIDEO_MEMORY BottomHalfUnlockVideoMemory;
|
|
|
|
gcsHAL_EXPORT_VIDEO_MEMORY ExportVideoMemory;
|
|
gcsHAL_NAME_VIDEO_MEMORY NameVideoMemory;
|
|
gcsHAL_IMPORT_VIDEO_MEMORY ImportVideoMemory;
|
|
|
|
gcsHAL_MAP_MEMORY MapMemory;
|
|
gcsHAL_UNMAP_MEMORY UnmapMemory;
|
|
|
|
gcsHAL_CACHE Cache;
|
|
|
|
gcsHAL_ATTACH Attach;
|
|
gcsHAL_DETACH Detach;
|
|
|
|
gcsHAL_EVENT_COMMIT Event;
|
|
gcsHAL_COMMIT Commit;
|
|
gcsHAL_COMMIT_DONE CommitDone;
|
|
|
|
gcsHAL_USER_SIGNAL UserSignal;
|
|
gcsHAL_SIGNAL Signal;
|
|
|
|
gcsHAL_WRITE_DATA WriteData;
|
|
gcsHAL_READ_REGISTER ReadRegisterData;
|
|
gcsHAL_WRITE_REGISTER WriteRegisterData;
|
|
gcsHAL_APB_AXIFE_ACCESS APBAXIFEAccess;
|
|
gcsHAL_READ_REGISTER_EX ReadRegisterDataEx;
|
|
gcsHAL_WRITE_REGISTER_EX WriteRegisterDataEx;
|
|
gcsHAL_SET_POWER_MANAGEMENT SetPowerManagement;
|
|
gcsHAL_QUERY_POWER_MANAGEMENT QueryPowerManagement;
|
|
gcsHAL_CONFIG_POWER_MANAGEMENT ConfigPowerManagement;
|
|
|
|
gcsHAL_GET_BASE_ADDRESS GetBaseAddress;
|
|
|
|
gcsHAL_SET_DEBUG_LEVEL_ZONE DebugLevelZone;
|
|
|
|
gcsHAL_QUERY_CPU_FREQUENCY QueryCPUFrequency;
|
|
|
|
gcsHAL_DEBUG_DUMP DebugDump;
|
|
|
|
gcsHAL_TIMESTAMP TimeStamp;
|
|
gcsHAL_DATABASE Database;
|
|
|
|
gcsHAL_GET_FRAME_INFO GetFrameInfo;
|
|
|
|
|
|
/* gcsHAL_DUMP_GPU_STATE */
|
|
/* gcsHAL_DUMP_EVENT */
|
|
|
|
gcsHAL_SET_FSCALE_VALUE SetFscaleValue;
|
|
gcsHAL_GET_FSCALE_VALUE GetFscaleValue;
|
|
|
|
gcsHAL_QUERY_RESET_TIME_STAMP QueryResetTimeStamp;
|
|
|
|
gcsHAL_CREATE_NATIVE_FENCE CreateNativeFence;
|
|
gcsHAL_WAIT_NATIVE_FENCE WaitNativeFence;
|
|
gcsHAL_SHBUF ShBuf;
|
|
gcsHAL_GET_GRAPHIC_BUFFER_FD GetGraphicBufferFd;
|
|
gcsHAL_VIDEO_MEMORY_METADATA SetVidMemMetadata;
|
|
gcsHAL_GET_VIDEO_MEMORY_FD GetVideoMemoryFd;
|
|
|
|
gcsHAL_DESTROY_MMU DestroyMmu;
|
|
|
|
gcsHAL_WAIT_FENCE WaitFence;
|
|
|
|
/* gcvHAL_DEVICE_MUTEX: */
|
|
gcsHAL_DEVICE_MUTEX DeviceMutex;
|
|
|
|
|
|
#if gcdDEC_ENABLE_AHB
|
|
gcsHAL_DEC300_READ DEC300Read;
|
|
gcsHAL_DEC300_WRITE DEC300Write;
|
|
gcsHAL_DEC300_FLUSH DEC300Flush;
|
|
gcsHAL_DEC300_FLUSH_WAIT DEC300FlushWait;
|
|
#endif
|
|
#if gcdENABLE_VIDEO_MEMORY_MIRROR
|
|
gcsHAL_SYNC_VIDEO_MEMORY SyncVideoMemory;
|
|
#endif
|
|
#if gcdENABLE_CLEAR_FENCE
|
|
gcsHAL_STORE_CLEAR_FENCE UserFence;
|
|
#endif
|
|
} u;
|
|
|
|
/* O/S specific device context. -- Needed for Windows WDDM device callbacks and kernel mode thunks. */
|
|
gctUINT64 devCtxt;
|
|
|
|
/* Device index. */
|
|
gctUINT32 devIndex;
|
|
|
|
/* API type. -- Needed for Windows WDDM device kernel mode thunks to set ClientHint when a context is created. */
|
|
gceAPI api;
|
|
|
|
} gcsHAL_INTERFACE;
|
|
|
|
#if VIVANTE_PROFILER
|
|
typedef struct _gcsHAL_PROFILER_INTERFACE {
|
|
/* Command code. */
|
|
gceHAL_COMMAND_CODES command;
|
|
|
|
/* Hardware type. */
|
|
gceHARDWARE_TYPE hardwareType;
|
|
|
|
/* Core index for current hardware type. */
|
|
gctUINT32 coreIndex;
|
|
|
|
/* Status value. */
|
|
gceSTATUS status;
|
|
|
|
/* Ignore information from TSL when doing IO control */
|
|
gctBOOL ignoreTLS;
|
|
|
|
/* Union of command structures. */
|
|
union profiler_u {
|
|
gcsHAL_GET_PROFILE_SETTING GetProfileSetting;
|
|
gcsHAL_SET_PROFILE_SETTING SetProfileSetting;
|
|
gcsHAL_READ_PROFILER_REGISTER_SETTING SetProfilerRegisterClear;
|
|
gcsHAL_READ_ALL_PROFILE_REGISTERS_PART1 RegisterProfileData_part1;
|
|
gcsHAL_READ_ALL_PROFILE_REGISTERS_PART2 RegisterProfileData_part2;
|
|
gcsHAL_PROFILE_REGISTERS_2D RegisterProfileData2D;
|
|
} u;
|
|
|
|
/* Device index. */
|
|
gctUINT32 devIndex;
|
|
|
|
} gcsHAL_PROFILER_INTERFACE;
|
|
#endif
|
|
|
|
/* State delta record. */
|
|
typedef struct _gcsSTATE_DELTA_RECORD *gcsSTATE_DELTA_RECORD_PTR;
|
|
typedef struct _gcsSTATE_DELTA_RECORD {
|
|
/* State address. */
|
|
gctUINT address;
|
|
|
|
/* State mask. */
|
|
gctUINT32 mask;
|
|
|
|
/* State data. */
|
|
gctUINT32 data;
|
|
} gcsSTATE_DELTA_RECORD;
|
|
|
|
/* State delta. */
|
|
typedef struct _gcsSTATE_DELTA {
|
|
/* For debugging: the number of delta in the order of creation. */
|
|
gctUINT num;
|
|
|
|
/*
|
|
* Main state delta ID. Every time state delta structure gets reinitialized,
|
|
* main ID is incremented. If main state ID overflows, all map entry IDs get
|
|
* reinitialized to make sure there is no potential erroneous match after
|
|
* the overflow.
|
|
*/
|
|
gctUINT id;
|
|
|
|
/* The number of contexts pending modification by the delta. */
|
|
gctINT refCount;
|
|
|
|
/* Vertex element count for the delta buffer. */
|
|
gctUINT elementCount;
|
|
|
|
/* Number of states currently stored in the record array. */
|
|
gctUINT recordCount;
|
|
|
|
/* Record array; holds all modified states in gcsSTATE_DELTA_RECORD. */
|
|
gctUINT64 recordArray;
|
|
|
|
/*
|
|
* Map entry ID is used for map entry validation. If map entry ID does not
|
|
* match the main state delta ID, the entry and the corresponding state are
|
|
* considered not in use.
|
|
*/
|
|
gctUINT64 mapEntryID;
|
|
gctUINT mapEntryIDSize;
|
|
|
|
/*
|
|
* If the map entry ID matches the main state delta ID, index points to
|
|
* the state record in the record array.
|
|
*/
|
|
gctUINT64 mapEntryIndex;
|
|
|
|
/* Previous and next state deltas in gcsSTATE_DELTA. */
|
|
gctUINT64 prev;
|
|
gctUINT64 next;
|
|
} gcsSTATE_DELTA;
|
|
|
|
typedef struct _gcsQUEUE {
|
|
/* Pointer to next gcsQUEUE structure in gcsQUEUE. */
|
|
gctUINT64 next;
|
|
|
|
/* Event information. */
|
|
gcsHAL_INTERFACE iface;
|
|
} gcsQUEUE;
|
|
|
|
/* A record chunk include multiple records to save allocation. */
|
|
typedef struct _gcsQUEUE_CHUNK {
|
|
struct _gcsQUEUE_CHUNK *next;
|
|
|
|
gcsQUEUE record[16];
|
|
} gcsQUEUE_CHUNK;
|
|
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
#endif /* __gc_hal_driver_shared_h_ */
|
|
|
|
|