TIM-VX/src
chxin66 3e8d5e3493
Added grouped conv2d layout inference (#419)
Signed-off-by: Chen Xin <jack.chen@verisilicon.com>

Co-authored-by: Chen Xin <jack.chen@verisilicon.com>
2022-06-28 14:52:26 +08:00
..
tim Added grouped conv2d layout inference (#419) 2022-06-28 14:52:26 +08:00