TIM-VX/include
chxin66 44cc6f9f09
lstm layout inference & Added unidirectional lstm layout inference (#392)
Signed-off-by: Chen Xin <jack.chen@verisilicon.com>

Co-authored-by: Chen Xin <jack.chen@verisilicon.com>
2022-05-29 22:40:43 +08:00
..
tim lstm layout inference & Added unidirectional lstm layout inference (#392) 2022-05-29 22:40:43 +08:00