TIM-VX/include/tim
Zongwu.Yang 77b801a590
Add layout inference feature (#34)
* mobilenet_v1_1.0_224_quant.tflite pass
* inception_v1_224_quant.tflite pass
* ssd_mobilenet_v2_fpnlite_320x320_coco17_quant.tflite pass

Signed-off-by: Zongwu Yang <zongwu.yang@verisilicon.com>
2021-05-08 09:29:47 +08:00
..
layout_infer Add layout inference feature (#34) 2021-05-08 09:29:47 +08:00
vx Add layout inference feature (#34) 2021-05-08 09:29:47 +08:00