TIM-VX/include
chxin66 96dedc1453
Added selu & celu & unit test (#366)
Signed-off-by: Chen Xin <jack.chen@verisilicon.com>

Co-authored-by: Chen Xin <jack.chen@verisilicon.com>
2022-04-18 14:35:29 +08:00
..
tim Added selu & celu & unit test (#366) 2022-04-18 14:35:29 +08:00