Chen Feiyue af50cc5e3f Added general Float16 support (#631) ... Added Float16 type definition from third-party Refine float16 bias handlling in conv2d Refine float16 case in conv2d Caution: Headers of float16 only be included when build unit_test Type: New Feature Signed-off-by: Feiyue Chen <Feiyue.Chen@verisilicon.com>		2023-08-12 10:04:16 +08:00
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experimental/trace	Integrate api trace into tim-vx source as an experimental feature. (#623)	2023-07-19 18:40:48 +08:00
lite	update copyright information	2023-01-20 12:49:48 +08:00
transform	Added op fusion for mean_stddev_normalization (#629)	2023-08-09 22:10:45 +08:00
utils/nbg_parser	update copyright information	2023-01-20 12:49:48 +08:00
vx	Added general Float16 support (#631)	2023-08-12 10:04:16 +08:00