281 lines
12 KiB
C++
281 lines
12 KiB
C++
/****************************************************************************
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*
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* Copyright (c) 2020 Vivante Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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*****************************************************************************/
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#include "permute_vector.h"
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#include "layout_infer_context.h"
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#include "tim/transform/layout_inference.h"
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#include "ops/conv2d_layout_inference.h"
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#include "ops/reduce_layout_inference.h"
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#include "ops/elementwise_layout_inference.h"
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#include "ops/activation_layout_inference.h"
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#include "ops/concat_layout_inferene.h"
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#include "ops/reshape_layout_inference.h"
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#include "ops/simple_ops_layout_inference.h"
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#include "ops/pool2d_layout_inference.h"
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#include "ops/softmax_layout_inference.h"
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#include "ops/squeeze_layout_inference.h"
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#include "ops/stack_layout_inference.h"
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#include "ops/space2depth_layout_inference.h"
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#include "ops/depth2space_layout_inference.h"
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#include "ops/space2batch_layout_inference.h"
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#include "ops/batch2space_layout_inference.h"
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#include "ops/pad_layout_inference.h"
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#include "ops/reduce_layout_inference.h"
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#include "ops/fullyconnected_layout_inference.h"
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#include "ops/resize_layout_inference.h"
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#include "ops/split_layout_inference.h"
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#include "ops/stridedslice_layout_inference.h"
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#include "ops/lrn_layout_inference.h"
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#include "ops/l2normalization_layout_inference.h"
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#include "ops/addn_layout_inference.h"
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#include <algorithm>
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#include <deque>
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#include "tim/vx/context.h"
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#include "tim/vx/graph.h"
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#include "tim/vx/operation.h"
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namespace tim {
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namespace transform {
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namespace layout_inference_impl {
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std::vector<std::shared_ptr<vx::Tensor>> HandleLayoutInfer(
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std::shared_ptr<layout_inference_impl::LayoutInferContext>& ctx,
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const std::shared_ptr<vx::Operation>& op);
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// Implemention for LayoutInferContext
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void LayoutInferContext::SetPermuteVector(std::shared_ptr<vx::Tensor> tensor,
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std::shared_ptr<IPermuteVector> pv) {
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if (tensor_pv_.end() != tensor_pv_.find(tensor)) {
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VSILOGD("Tensor PermuteVector has been setted.");
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}
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tensor_pv_[tensor] = pv;
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}
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const std::shared_ptr<IPermuteVector> LayoutInferContext::GetPermuteVector(
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const std::shared_ptr<vx::Tensor>& tensor) const {
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auto pv_it = tensor_pv_.find(tensor);
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if (pv_it != tensor_pv_.end()) {
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return pv_it->second;
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} else {
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VSILOGE("Tensor PermuteVecor has not beed setted.");
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assert(false);
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}
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return nullptr;
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}
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void LayoutInferContext::MarkVisited(const std::shared_ptr<vx::Operation>& op) {
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if (visited_op_.end() !=
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std::find(visited_op_.begin(), visited_op_.end(), op)) {
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VSILOGW("The operation has been mark as visited.");
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} else {
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visited_op_.push_back(op);
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}
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}
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bool LayoutInferContext::IsVisited(const std::shared_ptr<vx::Operation>& op) const {
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if (visited_op_.end() !=
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std::find(visited_op_.begin(), visited_op_.end(), op)) {
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return true;
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} else {
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return false;
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}
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}
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bool LayoutInferContext::IsReadyForInfer(
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const std::shared_ptr<vx::Operation>& op) const {
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for (const auto& tensor : op->impl()->InputsTensor()) {
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if (!tensor->IsConstTensor() &&
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(tensor_pv_.end() == tensor_pv_.find(tensor))) {
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return false;
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}
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}
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return true;
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}
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void LayoutInferContext::UpdateTensorMap(
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const std::shared_ptr<vx::Tensor>& t_src,
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const std::shared_ptr<vx::Tensor>& t_layout) {
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tensor_map_[t_src] = t_layout;
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}
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std::shared_ptr<vx::Tensor> LayoutInferContext::GetMapedTensor(
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const std::shared_ptr<vx::Tensor>& t_src) const {
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auto it = tensor_map_.find(t_src);
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if (it != tensor_map_.end()) {
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return it->second;
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} else {
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VSILOGE("Tensor has not beed inserted in tensor map.");
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assert(false);
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}
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return nullptr;
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}
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void LayoutInferContext::UpdateGraphInputMap(const std::shared_ptr<vx::Tensor>& i_src,
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const std::shared_ptr<vx::Tensor>& i_layout) {
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graph_input_map_[i_src] = i_layout;
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}
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#define REGIST_LAYOUT_INFERENCE(op_idx, name) \
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case op_idx: { \
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auto op_infer = std::make_shared<name##LayoutInfer>(op, ctx); \
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op_infer->OnInputs(next_tensors); \
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op_infer->OnOutputs(next_tensors); \
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break; \
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} \
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#define REGIST_REDUCE_LAYOUT_INFERENCE(op_idx) \
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case op_idx: { \
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auto reduce_type = op->impl()->node()->nn_param.reduce.type; \
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switch (reduce_type) { \
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REGIST_LAYOUT_INFERENCE(VSI_NN_REDUCE_MEAN, ReduceMean); \
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REGIST_LAYOUT_INFERENCE(VSI_NN_REDUCE_MAX, ReduceMax); \
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REGIST_LAYOUT_INFERENCE(VSI_NN_REDUCE_MIN, ReduceMin); \
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REGIST_LAYOUT_INFERENCE(VSI_NN_REDUCE_PROD, ReduceProd); \
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REGIST_LAYOUT_INFERENCE(VSI_NN_REDUCE_ANY, ReduceAny); \
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REGIST_LAYOUT_INFERENCE(VSI_NN_REDUCE_SUM, ReduceSum); \
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default: \
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VSILOGW("Op %d: Default layout inference pass for reduce.", reduce_type);\
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assert(false); \
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} \
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break; \
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} \
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std::vector<std::shared_ptr<vx::Tensor>> HandleLayoutInfer(
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std::shared_ptr<layout_inference_impl::LayoutInferContext>& ctx,
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const std::shared_ptr<vx::Operation>& op) {
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ctx->MarkVisited(op);
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auto op_id = op->impl()->operation_id_;
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std::vector<std::shared_ptr<vx::Tensor>> next_tensors;
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switch (op_id) {
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REGIST_LAYOUT_INFERENCE(VSI_NN_OP_CONV2D, Conv2d);
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REGIST_LAYOUT_INFERENCE(VSI_NN_OP_RELU, Relu);
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REGIST_LAYOUT_INFERENCE(VSI_NN_OP_RELU1, Relu1);
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REGIST_LAYOUT_INFERENCE(VSI_NN_OP_RELU6, Relu6);
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REGIST_LAYOUT_INFERENCE(VSI_NN_OP_ELU, Elu);
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REGIST_LAYOUT_INFERENCE(VSI_NN_OP_SIGMOID, Sigmoid);
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REGIST_LAYOUT_INFERENCE(VSI_NN_OP_MISH, Mish);
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REGIST_LAYOUT_INFERENCE(VSI_NN_OP_HARD_SIGMOID, HardSigmoid);
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REGIST_LAYOUT_INFERENCE(VSI_NN_OP_SOFTRELU, SoftRelu);
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REGIST_LAYOUT_INFERENCE(VSI_NN_OP_SWISH, HardSwish);
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REGIST_LAYOUT_INFERENCE(VSI_NN_OP_TANH, Tanh);
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REGIST_LAYOUT_INFERENCE(VSI_NN_OP_LEAKY_RELU, LeakyRelu);
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REGIST_LAYOUT_INFERENCE(VSI_NN_OP_CONCAT, Concat);
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REGIST_LAYOUT_INFERENCE(VSI_NN_OP_ADD, Add);
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REGIST_LAYOUT_INFERENCE(VSI_NN_OP_SUBTRACT, Sub);
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REGIST_LAYOUT_INFERENCE(VSI_NN_OP_MULTIPLY, Multiply);
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REGIST_LAYOUT_INFERENCE(VSI_NN_OP_DIVIDE, Div);
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REGIST_LAYOUT_INFERENCE(VSI_NN_OP_POW, Pow);
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REGIST_LAYOUT_INFERENCE(VSI_NN_OP_MINIMUM, Minimum);
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REGIST_LAYOUT_INFERENCE(VSI_NN_OP_MAXIMUM, Maximum);
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REGIST_LAYOUT_INFERENCE(VSI_NN_OP_RESHAPE, Reshape);
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REGIST_LAYOUT_INFERENCE(VSI_NN_OP_DATACONVERT, DataConvert);
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REGIST_LAYOUT_INFERENCE(VSI_NN_OP_NEG, Neg);
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REGIST_LAYOUT_INFERENCE(VSI_NN_OP_ABS, Abs);
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REGIST_LAYOUT_INFERENCE(VSI_NN_OP_SIN, Sin);
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REGIST_LAYOUT_INFERENCE(VSI_NN_OP_EXP, Exp);
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REGIST_LAYOUT_INFERENCE(VSI_NN_OP_LOG, Log);
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REGIST_LAYOUT_INFERENCE(VSI_NN_OP_SQRT, Sqrt);
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REGIST_LAYOUT_INFERENCE(VSI_NN_OP_RSQRT, Rsqrt);
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REGIST_LAYOUT_INFERENCE(VSI_NN_OP_SQUARE, Square);
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REGIST_LAYOUT_INFERENCE(VSI_NN_OP_LOGICAL_NOT, LogicalNot);
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REGIST_LAYOUT_INFERENCE(VSI_NN_OP_POOL, Pool2d);
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REGIST_LAYOUT_INFERENCE(VSI_NN_OP_SOFTMAX, Softmax);
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REGIST_LAYOUT_INFERENCE(VSI_NN_OP_SQUEEZE, Squeeze);
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REGIST_LAYOUT_INFERENCE(VSI_NN_OP_STACK, Stack);
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REGIST_LAYOUT_INFERENCE(VSI_NN_OP_SPACE2DEPTH, SpaceToDepth);
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REGIST_LAYOUT_INFERENCE(VSI_NN_OP_DEPTH2SPACE, DepthToSpace);
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REGIST_LAYOUT_INFERENCE(VSI_NN_OP_SPACE2BATCH, SpaceToBatch);
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REGIST_LAYOUT_INFERENCE(VSI_NN_OP_BATCH2SPACE, BatchToSpace);
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REGIST_LAYOUT_INFERENCE(VSI_NN_OP_PAD, Pad);
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REGIST_REDUCE_LAYOUT_INFERENCE(VSI_NN_OP_REDUCE);
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REGIST_LAYOUT_INFERENCE(VSI_NN_OP_FCL2, FullyConnected);
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REGIST_LAYOUT_INFERENCE(VSI_NN_OP_RESIZE, Resize);
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REGIST_LAYOUT_INFERENCE(VSI_NN_OP_SPLIT, Split);
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REGIST_LAYOUT_INFERENCE(VSI_NN_OP_STRIDED_SLICE, StridedSlice);
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REGIST_LAYOUT_INFERENCE(VSI_NN_OP_LRN2, LRN);
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REGIST_LAYOUT_INFERENCE(VSI_NN_OP_L2_NORMALIZE, L2Normalization);
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REGIST_LAYOUT_INFERENCE(VSI_NN_OP_ADDN, AddN);
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REGIST_LAYOUT_INFERENCE(VSI_NN_OP_PRELU, PRelu);
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default:
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VSILOGW("Op %d: Default layout inference pass.", op_id);
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assert(false);
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}
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return next_tensors;
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}
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} // namespace layout_inference_impl
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std::pair<std::shared_ptr<vx::Graph>,
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std::map<std::shared_ptr<vx::Tensor>,
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std::shared_ptr<vx::Tensor>>> LayoutInference(
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const std::shared_ptr<vx::Graph>& src_graph,
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std::shared_ptr<vx::Context>& ctx) {
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std::shared_ptr<vx::Graph> infer_graph = ctx->CreateGraph();
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std::map<std::shared_ptr<vx::Tensor>, std::shared_ptr<vx::Tensor>>
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graph_io_map;
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auto layout_infer_ctx =
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std::make_shared<layout_inference_impl::LayoutInferContext>(src_graph,
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infer_graph);
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std::deque<std::shared_ptr<vx::Tensor>> tensor_queue;
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auto graph_inputs = src_graph->InputsTensor();
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for (const auto& t_src : graph_inputs) {
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auto input = infer_graph->CreateTensor(t_src->GetSpec());
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layout_infer_ctx->UpdateTensorMap(t_src, input);
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layout_infer_ctx->UpdateGraphInputMap(t_src, input);
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tensor_queue.push_back(t_src);
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layout_infer_ctx->SetPermuteVector(t_src,
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MakeShared(t_src->GetShape().size()));
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}
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while (!tensor_queue.empty()) {
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const auto& tensor = tensor_queue.front();
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tensor_queue.pop_front();
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const auto& consumers = src_graph->GetConsumersOp(tensor);
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for (const auto& op : consumers) {
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if (!layout_infer_ctx->IsVisited(op) &&
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layout_infer_ctx->IsReadyForInfer(op)) {
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auto next_tensors =
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layout_inference_impl::HandleLayoutInfer(layout_infer_ctx, op);
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for (const auto& t : next_tensors) {
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tensor_queue.push_back(t);
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}
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}
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}
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}
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for (const auto& graph_input : layout_infer_ctx->GetGraphInputMap()) {
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graph_io_map[graph_input.first] = graph_input.second;
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}
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for (const auto& out_src : src_graph->OutputsTensor()) {
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graph_io_map[out_src] = layout_infer_ctx->GetMapedTensor(out_src);
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}
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return std::make_pair(infer_graph, graph_io_map);
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}
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} // namespace transform
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} // namespace tim
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