56 lines
1.3 KiB
Plaintext
56 lines
1.3 KiB
Plaintext
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/*Copyright 2020-2021 T-Head Semiconductor Co., Ltd.
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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MEMORY
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{
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MEM1(RWX) : ORIGIN = 0x00000004, LENGTH = 0x40000
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MEM2(RWX) : ORIGIN = 0x20000000, LENGTH = 0xc0000
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}
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__kernel_stack = 0x200bfff8 ;
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ENTRY(__start)
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SECTIONS {
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.text :
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{
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crt0.o (.text)
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*(.text*)
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. = ALIGN(0x10);
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} >MEM1
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.rodata :
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{
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*(.rodata*)
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. = ALIGN(0x4);
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__erodata = .;
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} > MEM1
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.data :
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{
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. = ALIGN(0x4);
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__data_start__ = .;
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*(.data*)
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*(.eh_frame*)
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. = ALIGN(0x4);
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__data_end__ = .;
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} >MEM2 AT > MEM1
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.bss :
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{
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. = ALIGN(0x4);
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__bss_start__ = .;
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*(.bss)
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. = ALIGN(0x4);
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__bss_end__ = .;
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*.(COMMON)
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} >MEM2
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}
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