1872 lines
49 KiB
Plaintext
1872 lines
49 KiB
Plaintext
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{
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"design": {
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"design_info": {
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"boundary_crc": "0x2F424F078603B59C",
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"device": "xc7z010clg400-2",
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"gen_directory": "../../../../zynq7mb_test.gen/sources_1/bd/design_1",
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"name": "design_1",
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"rev_ctrl_bd_flag": "RevCtrlBdOff",
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"synth_flow_mode": "Hierarchical",
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"tool_version": "2022.2",
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"validated": "true"
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},
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"design_tree": {
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"processing_system7_0": ""
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},
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"interface_ports": {
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"DDR": {
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"mode": "Master",
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"vlnv_bus_definition": "xilinx.com:interface:ddrx:1.0",
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"vlnv": "xilinx.com:interface:ddrx_rtl:1.0",
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"parameters": {
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"AXI_ARBITRATION_SCHEME": {
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"value": "TDM",
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"value_src": "default"
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},
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"BURST_LENGTH": {
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"value": "8",
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"value_src": "default"
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},
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"CAN_DEBUG": {
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"value": "false",
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"value_src": "default"
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},
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"CAS_LATENCY": {
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"value": "11",
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"value_src": "default"
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},
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"CAS_WRITE_LATENCY": {
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"value": "11",
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"value_src": "default"
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},
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"CS_ENABLED": {
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"value": "true",
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"value_src": "default"
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},
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"DATA_MASK_ENABLED": {
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"value": "true",
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"value_src": "default"
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},
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"DATA_WIDTH": {
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"value": "8",
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"value_src": "default"
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},
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"MEMORY_TYPE": {
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"value": "COMPONENTS",
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"value_src": "default"
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},
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"MEM_ADDR_MAP": {
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"value": "ROW_COLUMN_BANK",
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"value_src": "default"
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},
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"SLOT": {
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"value": "Single",
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"value_src": "default"
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},
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"TIMEPERIOD_PS": {
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"value": "1250",
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"value_src": "default"
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}
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},
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"port_maps": {
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"CAS_N": {
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"physical_name": "DDR_cas_n",
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"direction": "IO"
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},
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"CKE": {
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"physical_name": "DDR_cke",
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"direction": "IO"
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},
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"CK_N": {
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"physical_name": "DDR_ck_n",
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"direction": "IO"
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},
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"CK_P": {
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"physical_name": "DDR_ck_p",
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"direction": "IO"
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},
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"CS_N": {
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"physical_name": "DDR_cs_n",
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"direction": "IO"
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},
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"RESET_N": {
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"physical_name": "DDR_reset_n",
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"direction": "IO"
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},
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"ODT": {
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"physical_name": "DDR_odt",
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"direction": "IO"
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},
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"RAS_N": {
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"physical_name": "DDR_ras_n",
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"direction": "IO"
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},
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"WE_N": {
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"physical_name": "DDR_we_n",
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"direction": "IO"
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},
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"BA": {
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"physical_name": "DDR_ba",
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"direction": "IO",
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"left": "2",
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"right": "0"
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},
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"ADDR": {
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"physical_name": "DDR_addr",
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"direction": "IO",
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"left": "14",
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"right": "0"
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},
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"DM": {
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"physical_name": "DDR_dm",
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"direction": "IO",
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"left": "3",
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"right": "0"
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},
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"DQ": {
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"physical_name": "DDR_dq",
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"direction": "IO",
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"left": "31",
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"right": "0"
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},
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"DQS_N": {
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"physical_name": "DDR_dqs_n",
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"direction": "IO",
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"left": "3",
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"right": "0"
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},
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"DQS_P": {
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"physical_name": "DDR_dqs_p",
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"direction": "IO",
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"left": "3",
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"right": "0"
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}
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}
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},
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"FIXED_IO": {
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"mode": "Master",
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"vlnv_bus_definition": "xilinx.com:display_processing_system7:fixedio:1.0",
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"vlnv": "xilinx.com:display_processing_system7:fixedio_rtl:1.0",
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"parameters": {
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"CAN_DEBUG": {
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"value": "false",
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"value_src": "default"
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}
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},
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"port_maps": {
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"MIO": {
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"physical_name": "FIXED_IO_mio",
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"direction": "IO",
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"left": "53",
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"right": "0"
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},
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"DDR_VRN": {
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"physical_name": "FIXED_IO_ddr_vrn",
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"direction": "IO"
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},
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"DDR_VRP": {
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"physical_name": "FIXED_IO_ddr_vrp",
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"direction": "IO"
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},
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"PS_SRSTB": {
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"physical_name": "FIXED_IO_ps_srstb",
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"direction": "IO"
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},
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"PS_CLK": {
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"physical_name": "FIXED_IO_ps_clk",
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"direction": "IO"
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},
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"PS_PORB": {
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"physical_name": "FIXED_IO_ps_porb",
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"direction": "IO"
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}
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}
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},
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"UART": {
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"mode": "Master",
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"vlnv_bus_definition": "xilinx.com:interface:uart:1.0",
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"vlnv": "xilinx.com:interface:uart_rtl:1.0",
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"port_maps": {
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"TxD": {
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"physical_name": "UART_txd",
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"direction": "O"
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},
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"RxD": {
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"physical_name": "UART_rxd",
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"direction": "I"
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}
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}
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}
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},
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"ports": {
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"clk_axi": {
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"type": "clk",
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"direction": "O",
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"parameters": {
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"CLK_DOMAIN": {
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"value": "design_1_processing_system7_0_1_FCLK_CLK0",
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"value_src": "default_prop"
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},
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"FREQ_HZ": {
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"value": "100000000",
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"value_src": "user_prop"
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},
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"FREQ_TOLERANCE_HZ": {
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"value": "0",
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"value_src": "default"
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},
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"INSERT_VIP": {
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"value": "0",
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"value_src": "default"
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},
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"PHASE": {
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"value": "0.0",
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"value_src": "default"
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}
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}
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},
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"rstn_axi": {
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"type": "rst",
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"direction": "O",
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"parameters": {
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"INSERT_VIP": {
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"value": "0",
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"value_src": "default"
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},
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"POLARITY": {
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"value": "ACTIVE_LOW",
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"value_src": "default"
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}
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}
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}
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},
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"components": {
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"processing_system7_0": {
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"vlnv": "xilinx.com:ip:processing_system7:5.5",
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"xci_name": "design_1_processing_system7_0_1",
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"xci_path": "ip/design_1_processing_system7_0_1/design_1_processing_system7_0_1.xci",
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"inst_hier_path": "processing_system7_0",
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"parameters": {
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"PCW_ACT_APU_PERIPHERAL_FREQMHZ": {
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"value": "666.666687"
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},
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"PCW_ACT_CAN0_PERIPHERAL_FREQMHZ": {
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"value": "23.8095"
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},
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"PCW_ACT_CAN1_PERIPHERAL_FREQMHZ": {
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"value": "23.8095"
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},
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"PCW_ACT_CAN_PERIPHERAL_FREQMHZ": {
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"value": "10.000000"
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},
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"PCW_ACT_DCI_PERIPHERAL_FREQMHZ": {
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"value": "10.158730"
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},
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"PCW_ACT_ENET0_PERIPHERAL_FREQMHZ": {
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"value": "125.000000"
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},
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"PCW_ACT_ENET1_PERIPHERAL_FREQMHZ": {
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"value": "10.000000"
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},
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"PCW_ACT_FPGA0_PERIPHERAL_FREQMHZ": {
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"value": "100.000000"
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},
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"PCW_ACT_FPGA1_PERIPHERAL_FREQMHZ": {
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"value": "10.000000"
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},
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"PCW_ACT_FPGA2_PERIPHERAL_FREQMHZ": {
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"value": "10.000000"
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},
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"PCW_ACT_FPGA3_PERIPHERAL_FREQMHZ": {
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"value": "10.000000"
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},
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"PCW_ACT_I2C_PERIPHERAL_FREQMHZ": {
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"value": "50"
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},
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"PCW_ACT_PCAP_PERIPHERAL_FREQMHZ": {
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"value": "200.000000"
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},
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"PCW_ACT_QSPI_PERIPHERAL_FREQMHZ": {
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"value": "10.000000"
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},
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"PCW_ACT_SDIO_PERIPHERAL_FREQMHZ": {
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"value": "100.000000"
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},
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"PCW_ACT_SMC_PERIPHERAL_FREQMHZ": {
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"value": "10.000000"
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},
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"PCW_ACT_SPI_PERIPHERAL_FREQMHZ": {
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"value": "10.000000"
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},
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"PCW_ACT_TPIU_PERIPHERAL_FREQMHZ": {
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"value": "200.000000"
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},
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"PCW_ACT_TTC0_CLK0_PERIPHERAL_FREQMHZ": {
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"value": "111.111115"
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},
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"PCW_ACT_TTC0_CLK1_PERIPHERAL_FREQMHZ": {
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"value": "111.111115"
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},
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"PCW_ACT_TTC0_CLK2_PERIPHERAL_FREQMHZ": {
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"value": "111.111115"
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},
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"PCW_ACT_TTC1_CLK0_PERIPHERAL_FREQMHZ": {
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"value": "111.111115"
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},
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"PCW_ACT_TTC1_CLK1_PERIPHERAL_FREQMHZ": {
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"value": "111.111115"
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},
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"PCW_ACT_TTC1_CLK2_PERIPHERAL_FREQMHZ": {
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"value": "111.111115"
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},
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"PCW_ACT_TTC_PERIPHERAL_FREQMHZ": {
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"value": "50"
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},
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"PCW_ACT_UART_PERIPHERAL_FREQMHZ": {
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"value": "100.000000"
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},
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"PCW_ACT_USB0_PERIPHERAL_FREQMHZ": {
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"value": "60"
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},
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"PCW_ACT_USB1_PERIPHERAL_FREQMHZ": {
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"value": "60"
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},
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"PCW_ACT_WDT_PERIPHERAL_FREQMHZ": {
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"value": "111.111115"
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},
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"PCW_APU_CLK_RATIO_ENABLE": {
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"value": "6:2:1"
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},
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"PCW_APU_PERIPHERAL_FREQMHZ": {
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"value": "666.666666"
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},
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"PCW_CAN0_PERIPHERAL_CLKSRC": {
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"value": "External"
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},
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"PCW_CAN0_PERIPHERAL_ENABLE": {
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"value": "0"
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},
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"PCW_CAN1_PERIPHERAL_CLKSRC": {
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"value": "External"
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},
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"PCW_CAN1_PERIPHERAL_ENABLE": {
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"value": "0"
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},
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"PCW_CAN_PERIPHERAL_CLKSRC": {
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"value": "IO PLL"
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},
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"PCW_CAN_PERIPHERAL_VALID": {
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"value": "0"
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},
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"PCW_CLK0_FREQ": {
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"value": "100000000"
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},
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"PCW_CLK1_FREQ": {
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"value": "10000000"
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},
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"PCW_CLK2_FREQ": {
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"value": "10000000"
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},
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"PCW_CLK3_FREQ": {
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"value": "10000000"
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},
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||
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"PCW_CPU_CPU_6X4X_MAX_RANGE": {
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||
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"value": "767"
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},
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|
"PCW_CPU_PERIPHERAL_CLKSRC": {
|
||
|
|
"value": "ARM PLL"
|
||
|
|
},
|
||
|
|
"PCW_CRYSTAL_PERIPHERAL_FREQMHZ": {
|
||
|
|
"value": "33.3333333"
|
||
|
|
},
|
||
|
|
"PCW_DCI_PERIPHERAL_CLKSRC": {
|
||
|
|
"value": "DDR PLL"
|
||
|
|
},
|
||
|
|
"PCW_DCI_PERIPHERAL_FREQMHZ": {
|
||
|
|
"value": "10.159"
|
||
|
|
},
|
||
|
|
"PCW_DDR_PERIPHERAL_CLKSRC": {
|
||
|
|
"value": "DDR PLL"
|
||
|
|
},
|
||
|
|
"PCW_DDR_RAM_BASEADDR": {
|
||
|
|
"value": "0x00100000"
|
||
|
|
},
|
||
|
|
"PCW_DDR_RAM_HIGHADDR": {
|
||
|
|
"value": "0x3FFFFFFF"
|
||
|
|
},
|
||
|
|
"PCW_DM_WIDTH": {
|
||
|
|
"value": "4"
|
||
|
|
},
|
||
|
|
"PCW_DQS_WIDTH": {
|
||
|
|
"value": "4"
|
||
|
|
},
|
||
|
|
"PCW_DQ_WIDTH": {
|
||
|
|
"value": "32"
|
||
|
|
},
|
||
|
|
"PCW_ENET0_BASEADDR": {
|
||
|
|
"value": "0xE000B000"
|
||
|
|
},
|
||
|
|
"PCW_ENET0_ENET0_IO": {
|
||
|
|
"value": "MIO 16 .. 27"
|
||
|
|
},
|
||
|
|
"PCW_ENET0_GRP_MDIO_ENABLE": {
|
||
|
|
"value": "1"
|
||
|
|
},
|
||
|
|
"PCW_ENET0_GRP_MDIO_IO": {
|
||
|
|
"value": "MIO 52 .. 53"
|
||
|
|
},
|
||
|
|
"PCW_ENET0_HIGHADDR": {
|
||
|
|
"value": "0xE000BFFF"
|
||
|
|
},
|
||
|
|
"PCW_ENET0_PERIPHERAL_CLKSRC": {
|
||
|
|
"value": "IO PLL"
|
||
|
|
},
|
||
|
|
"PCW_ENET0_PERIPHERAL_ENABLE": {
|
||
|
|
"value": "1"
|
||
|
|
},
|
||
|
|
"PCW_ENET0_PERIPHERAL_FREQMHZ": {
|
||
|
|
"value": "1000 Mbps"
|
||
|
|
},
|
||
|
|
"PCW_ENET0_RESET_ENABLE": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_ENET1_PERIPHERAL_CLKSRC": {
|
||
|
|
"value": "IO PLL"
|
||
|
|
},
|
||
|
|
"PCW_ENET1_PERIPHERAL_ENABLE": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_ENET_RESET_ENABLE": {
|
||
|
|
"value": "1"
|
||
|
|
},
|
||
|
|
"PCW_ENET_RESET_POLARITY": {
|
||
|
|
"value": "Active Low"
|
||
|
|
},
|
||
|
|
"PCW_ENET_RESET_SELECT": {
|
||
|
|
"value": "Share reset pin"
|
||
|
|
},
|
||
|
|
"PCW_EN_4K_TIMER": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_EN_CAN0": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_EN_CAN1": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_EN_CLK0_PORT": {
|
||
|
|
"value": "1"
|
||
|
|
},
|
||
|
|
"PCW_EN_CLK1_PORT": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_EN_CLK2_PORT": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_EN_CLK3_PORT": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_EN_CLKTRIG0_PORT": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_EN_CLKTRIG1_PORT": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_EN_CLKTRIG2_PORT": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_EN_CLKTRIG3_PORT": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_EN_DDR": {
|
||
|
|
"value": "1"
|
||
|
|
},
|
||
|
|
"PCW_EN_EMIO_CAN0": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_EN_EMIO_CAN1": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_EN_EMIO_CD_SDIO0": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_EN_EMIO_CD_SDIO1": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_EN_EMIO_ENET0": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_EN_EMIO_ENET1": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_EN_EMIO_GPIO": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_EN_EMIO_I2C0": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_EN_EMIO_I2C1": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_EN_EMIO_MODEM_UART0": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_EN_EMIO_MODEM_UART1": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_EN_EMIO_PJTAG": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_EN_EMIO_SDIO0": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_EN_EMIO_SDIO1": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_EN_EMIO_SPI0": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_EN_EMIO_SPI1": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_EN_EMIO_SRAM_INT": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_EN_EMIO_TRACE": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_EN_EMIO_TTC0": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_EN_EMIO_TTC1": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_EN_EMIO_UART0": {
|
||
|
|
"value": "1"
|
||
|
|
},
|
||
|
|
"PCW_EN_EMIO_UART1": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_EN_EMIO_WDT": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_EN_EMIO_WP_SDIO0": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_EN_EMIO_WP_SDIO1": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_EN_ENET0": {
|
||
|
|
"value": "1"
|
||
|
|
},
|
||
|
|
"PCW_EN_ENET1": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_EN_GPIO": {
|
||
|
|
"value": "1"
|
||
|
|
},
|
||
|
|
"PCW_EN_I2C0": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_EN_I2C1": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_EN_MODEM_UART0": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_EN_MODEM_UART1": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_EN_PJTAG": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_EN_PTP_ENET0": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_EN_PTP_ENET1": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_EN_QSPI": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_EN_RST0_PORT": {
|
||
|
|
"value": "1"
|
||
|
|
},
|
||
|
|
"PCW_EN_RST1_PORT": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_EN_RST2_PORT": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_EN_RST3_PORT": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_EN_SDIO0": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_EN_SDIO1": {
|
||
|
|
"value": "1"
|
||
|
|
},
|
||
|
|
"PCW_EN_SMC": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_EN_SPI0": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_EN_SPI1": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_EN_TRACE": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_EN_TTC0": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_EN_TTC1": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_EN_UART0": {
|
||
|
|
"value": "1"
|
||
|
|
},
|
||
|
|
"PCW_EN_UART1": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_EN_USB0": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_EN_USB1": {
|
||
|
|
"value": "1"
|
||
|
|
},
|
||
|
|
"PCW_EN_WDT": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_FCLK0_PERIPHERAL_CLKSRC": {
|
||
|
|
"value": "IO PLL"
|
||
|
|
},
|
||
|
|
"PCW_FCLK1_PERIPHERAL_CLKSRC": {
|
||
|
|
"value": "IO PLL"
|
||
|
|
},
|
||
|
|
"PCW_FCLK2_PERIPHERAL_CLKSRC": {
|
||
|
|
"value": "IO PLL"
|
||
|
|
},
|
||
|
|
"PCW_FCLK3_PERIPHERAL_CLKSRC": {
|
||
|
|
"value": "IO PLL"
|
||
|
|
},
|
||
|
|
"PCW_FCLK_CLK0_BUF": {
|
||
|
|
"value": "TRUE"
|
||
|
|
},
|
||
|
|
"PCW_FPGA0_PERIPHERAL_FREQMHZ": {
|
||
|
|
"value": "100"
|
||
|
|
},
|
||
|
|
"PCW_FPGA1_PERIPHERAL_FREQMHZ": {
|
||
|
|
"value": "50"
|
||
|
|
},
|
||
|
|
"PCW_FPGA2_PERIPHERAL_FREQMHZ": {
|
||
|
|
"value": "50"
|
||
|
|
},
|
||
|
|
"PCW_FPGA3_PERIPHERAL_FREQMHZ": {
|
||
|
|
"value": "50"
|
||
|
|
},
|
||
|
|
"PCW_FPGA_FCLK0_ENABLE": {
|
||
|
|
"value": "1"
|
||
|
|
},
|
||
|
|
"PCW_GP0_EN_MODIFIABLE_TXN": {
|
||
|
|
"value": "1"
|
||
|
|
},
|
||
|
|
"PCW_GP0_NUM_READ_THREADS": {
|
||
|
|
"value": "4"
|
||
|
|
},
|
||
|
|
"PCW_GP0_NUM_WRITE_THREADS": {
|
||
|
|
"value": "4"
|
||
|
|
},
|
||
|
|
"PCW_GP1_EN_MODIFIABLE_TXN": {
|
||
|
|
"value": "1"
|
||
|
|
},
|
||
|
|
"PCW_GP1_NUM_READ_THREADS": {
|
||
|
|
"value": "4"
|
||
|
|
},
|
||
|
|
"PCW_GP1_NUM_WRITE_THREADS": {
|
||
|
|
"value": "4"
|
||
|
|
},
|
||
|
|
"PCW_GPIO_BASEADDR": {
|
||
|
|
"value": "0xE000A000"
|
||
|
|
},
|
||
|
|
"PCW_GPIO_EMIO_GPIO_ENABLE": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_GPIO_HIGHADDR": {
|
||
|
|
"value": "0xE000AFFF"
|
||
|
|
},
|
||
|
|
"PCW_GPIO_MIO_GPIO_ENABLE": {
|
||
|
|
"value": "1"
|
||
|
|
},
|
||
|
|
"PCW_GPIO_MIO_GPIO_IO": {
|
||
|
|
"value": "MIO"
|
||
|
|
},
|
||
|
|
"PCW_GPIO_PERIPHERAL_ENABLE": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_I2C0_PERIPHERAL_ENABLE": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_I2C1_PERIPHERAL_ENABLE": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_I2C_RESET_ENABLE": {
|
||
|
|
"value": "1"
|
||
|
|
},
|
||
|
|
"PCW_I2C_RESET_POLARITY": {
|
||
|
|
"value": "Active Low"
|
||
|
|
},
|
||
|
|
"PCW_IMPORT_BOARD_PRESET": {
|
||
|
|
"value": "None"
|
||
|
|
},
|
||
|
|
"PCW_INCLUDE_ACP_TRANS_CHECK": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_IRQ_F2P_MODE": {
|
||
|
|
"value": "DIRECT"
|
||
|
|
},
|
||
|
|
"PCW_MIO_0_IOTYPE": {
|
||
|
|
"value": "LVCMOS 3.3V"
|
||
|
|
},
|
||
|
|
"PCW_MIO_0_PULLUP": {
|
||
|
|
"value": "enabled"
|
||
|
|
},
|
||
|
|
"PCW_MIO_0_SLEW": {
|
||
|
|
"value": "slow"
|
||
|
|
},
|
||
|
|
"PCW_MIO_10_IOTYPE": {
|
||
|
|
"value": "LVCMOS 3.3V"
|
||
|
|
},
|
||
|
|
"PCW_MIO_10_PULLUP": {
|
||
|
|
"value": "enabled"
|
||
|
|
},
|
||
|
|
"PCW_MIO_10_SLEW": {
|
||
|
|
"value": "slow"
|
||
|
|
},
|
||
|
|
"PCW_MIO_11_IOTYPE": {
|
||
|
|
"value": "LVCMOS 3.3V"
|
||
|
|
},
|
||
|
|
"PCW_MIO_11_PULLUP": {
|
||
|
|
"value": "enabled"
|
||
|
|
},
|
||
|
|
"PCW_MIO_11_SLEW": {
|
||
|
|
"value": "slow"
|
||
|
|
},
|
||
|
|
"PCW_MIO_12_IOTYPE": {
|
||
|
|
"value": "LVCMOS 3.3V"
|
||
|
|
},
|
||
|
|
"PCW_MIO_12_PULLUP": {
|
||
|
|
"value": "enabled"
|
||
|
|
},
|
||
|
|
"PCW_MIO_12_SLEW": {
|
||
|
|
"value": "slow"
|
||
|
|
},
|
||
|
|
"PCW_MIO_13_IOTYPE": {
|
||
|
|
"value": "LVCMOS 3.3V"
|
||
|
|
},
|
||
|
|
"PCW_MIO_13_PULLUP": {
|
||
|
|
"value": "enabled"
|
||
|
|
},
|
||
|
|
"PCW_MIO_13_SLEW": {
|
||
|
|
"value": "slow"
|
||
|
|
},
|
||
|
|
"PCW_MIO_14_IOTYPE": {
|
||
|
|
"value": "LVCMOS 3.3V"
|
||
|
|
},
|
||
|
|
"PCW_MIO_14_PULLUP": {
|
||
|
|
"value": "enabled"
|
||
|
|
},
|
||
|
|
"PCW_MIO_14_SLEW": {
|
||
|
|
"value": "slow"
|
||
|
|
},
|
||
|
|
"PCW_MIO_15_IOTYPE": {
|
||
|
|
"value": "LVCMOS 3.3V"
|
||
|
|
},
|
||
|
|
"PCW_MIO_15_PULLUP": {
|
||
|
|
"value": "enabled"
|
||
|
|
},
|
||
|
|
"PCW_MIO_15_SLEW": {
|
||
|
|
"value": "slow"
|
||
|
|
},
|
||
|
|
"PCW_MIO_16_IOTYPE": {
|
||
|
|
"value": "LVCMOS 1.8V"
|
||
|
|
},
|
||
|
|
"PCW_MIO_16_PULLUP": {
|
||
|
|
"value": "enabled"
|
||
|
|
},
|
||
|
|
"PCW_MIO_16_SLEW": {
|
||
|
|
"value": "slow"
|
||
|
|
},
|
||
|
|
"PCW_MIO_17_IOTYPE": {
|
||
|
|
"value": "LVCMOS 1.8V"
|
||
|
|
},
|
||
|
|
"PCW_MIO_17_PULLUP": {
|
||
|
|
"value": "enabled"
|
||
|
|
},
|
||
|
|
"PCW_MIO_17_SLEW": {
|
||
|
|
"value": "slow"
|
||
|
|
},
|
||
|
|
"PCW_MIO_18_IOTYPE": {
|
||
|
|
"value": "LVCMOS 1.8V"
|
||
|
|
},
|
||
|
|
"PCW_MIO_18_PULLUP": {
|
||
|
|
"value": "enabled"
|
||
|
|
},
|
||
|
|
"PCW_MIO_18_SLEW": {
|
||
|
|
"value": "slow"
|
||
|
|
},
|
||
|
|
"PCW_MIO_19_IOTYPE": {
|
||
|
|
"value": "LVCMOS 1.8V"
|
||
|
|
},
|
||
|
|
"PCW_MIO_19_PULLUP": {
|
||
|
|
"value": "enabled"
|
||
|
|
},
|
||
|
|
"PCW_MIO_19_SLEW": {
|
||
|
|
"value": "slow"
|
||
|
|
},
|
||
|
|
"PCW_MIO_1_IOTYPE": {
|
||
|
|
"value": "LVCMOS 3.3V"
|
||
|
|
},
|
||
|
|
"PCW_MIO_1_PULLUP": {
|
||
|
|
"value": "enabled"
|
||
|
|
},
|
||
|
|
"PCW_MIO_1_SLEW": {
|
||
|
|
"value": "slow"
|
||
|
|
},
|
||
|
|
"PCW_MIO_20_IOTYPE": {
|
||
|
|
"value": "LVCMOS 1.8V"
|
||
|
|
},
|
||
|
|
"PCW_MIO_20_PULLUP": {
|
||
|
|
"value": "enabled"
|
||
|
|
},
|
||
|
|
"PCW_MIO_20_SLEW": {
|
||
|
|
"value": "slow"
|
||
|
|
},
|
||
|
|
"PCW_MIO_21_IOTYPE": {
|
||
|
|
"value": "LVCMOS 1.8V"
|
||
|
|
},
|
||
|
|
"PCW_MIO_21_PULLUP": {
|
||
|
|
"value": "enabled"
|
||
|
|
},
|
||
|
|
"PCW_MIO_21_SLEW": {
|
||
|
|
"value": "slow"
|
||
|
|
},
|
||
|
|
"PCW_MIO_22_IOTYPE": {
|
||
|
|
"value": "LVCMOS 1.8V"
|
||
|
|
},
|
||
|
|
"PCW_MIO_22_PULLUP": {
|
||
|
|
"value": "enabled"
|
||
|
|
},
|
||
|
|
"PCW_MIO_22_SLEW": {
|
||
|
|
"value": "slow"
|
||
|
|
},
|
||
|
|
"PCW_MIO_23_IOTYPE": {
|
||
|
|
"value": "LVCMOS 1.8V"
|
||
|
|
},
|
||
|
|
"PCW_MIO_23_PULLUP": {
|
||
|
|
"value": "enabled"
|
||
|
|
},
|
||
|
|
"PCW_MIO_23_SLEW": {
|
||
|
|
"value": "slow"
|
||
|
|
},
|
||
|
|
"PCW_MIO_24_IOTYPE": {
|
||
|
|
"value": "LVCMOS 1.8V"
|
||
|
|
},
|
||
|
|
"PCW_MIO_24_PULLUP": {
|
||
|
|
"value": "enabled"
|
||
|
|
},
|
||
|
|
"PCW_MIO_24_SLEW": {
|
||
|
|
"value": "slow"
|
||
|
|
},
|
||
|
|
"PCW_MIO_25_IOTYPE": {
|
||
|
|
"value": "LVCMOS 1.8V"
|
||
|
|
},
|
||
|
|
"PCW_MIO_25_PULLUP": {
|
||
|
|
"value": "enabled"
|
||
|
|
},
|
||
|
|
"PCW_MIO_25_SLEW": {
|
||
|
|
"value": "slow"
|
||
|
|
},
|
||
|
|
"PCW_MIO_26_IOTYPE": {
|
||
|
|
"value": "LVCMOS 1.8V"
|
||
|
|
},
|
||
|
|
"PCW_MIO_26_PULLUP": {
|
||
|
|
"value": "enabled"
|
||
|
|
},
|
||
|
|
"PCW_MIO_26_SLEW": {
|
||
|
|
"value": "slow"
|
||
|
|
},
|
||
|
|
"PCW_MIO_27_IOTYPE": {
|
||
|
|
"value": "LVCMOS 1.8V"
|
||
|
|
},
|
||
|
|
"PCW_MIO_27_PULLUP": {
|
||
|
|
"value": "enabled"
|
||
|
|
},
|
||
|
|
"PCW_MIO_27_SLEW": {
|
||
|
|
"value": "slow"
|
||
|
|
},
|
||
|
|
"PCW_MIO_28_IOTYPE": {
|
||
|
|
"value": "LVCMOS 1.8V"
|
||
|
|
},
|
||
|
|
"PCW_MIO_28_PULLUP": {
|
||
|
|
"value": "enabled"
|
||
|
|
},
|
||
|
|
"PCW_MIO_28_SLEW": {
|
||
|
|
"value": "slow"
|
||
|
|
},
|
||
|
|
"PCW_MIO_29_IOTYPE": {
|
||
|
|
"value": "LVCMOS 1.8V"
|
||
|
|
},
|
||
|
|
"PCW_MIO_29_PULLUP": {
|
||
|
|
"value": "enabled"
|
||
|
|
},
|
||
|
|
"PCW_MIO_29_SLEW": {
|
||
|
|
"value": "slow"
|
||
|
|
},
|
||
|
|
"PCW_MIO_2_IOTYPE": {
|
||
|
|
"value": "LVCMOS 3.3V"
|
||
|
|
},
|
||
|
|
"PCW_MIO_2_SLEW": {
|
||
|
|
"value": "slow"
|
||
|
|
},
|
||
|
|
"PCW_MIO_30_IOTYPE": {
|
||
|
|
"value": "LVCMOS 1.8V"
|
||
|
|
},
|
||
|
|
"PCW_MIO_30_PULLUP": {
|
||
|
|
"value": "enabled"
|
||
|
|
},
|
||
|
|
"PCW_MIO_30_SLEW": {
|
||
|
|
"value": "slow"
|
||
|
|
},
|
||
|
|
"PCW_MIO_31_IOTYPE": {
|
||
|
|
"value": "LVCMOS 1.8V"
|
||
|
|
},
|
||
|
|
"PCW_MIO_31_PULLUP": {
|
||
|
|
"value": "enabled"
|
||
|
|
},
|
||
|
|
"PCW_MIO_31_SLEW": {
|
||
|
|
"value": "slow"
|
||
|
|
},
|
||
|
|
"PCW_MIO_32_IOTYPE": {
|
||
|
|
"value": "LVCMOS 1.8V"
|
||
|
|
},
|
||
|
|
"PCW_MIO_32_PULLUP": {
|
||
|
|
"value": "enabled"
|
||
|
|
},
|
||
|
|
"PCW_MIO_32_SLEW": {
|
||
|
|
"value": "slow"
|
||
|
|
},
|
||
|
|
"PCW_MIO_33_IOTYPE": {
|
||
|
|
"value": "LVCMOS 1.8V"
|
||
|
|
},
|
||
|
|
"PCW_MIO_33_PULLUP": {
|
||
|
|
"value": "enabled"
|
||
|
|
},
|
||
|
|
"PCW_MIO_33_SLEW": {
|
||
|
|
"value": "slow"
|
||
|
|
},
|
||
|
|
"PCW_MIO_34_IOTYPE": {
|
||
|
|
"value": "LVCMOS 1.8V"
|
||
|
|
},
|
||
|
|
"PCW_MIO_34_PULLUP": {
|
||
|
|
"value": "enabled"
|
||
|
|
},
|
||
|
|
"PCW_MIO_34_SLEW": {
|
||
|
|
"value": "slow"
|
||
|
|
},
|
||
|
|
"PCW_MIO_35_IOTYPE": {
|
||
|
|
"value": "LVCMOS 1.8V"
|
||
|
|
},
|
||
|
|
"PCW_MIO_35_PULLUP": {
|
||
|
|
"value": "enabled"
|
||
|
|
},
|
||
|
|
"PCW_MIO_35_SLEW": {
|
||
|
|
"value": "slow"
|
||
|
|
},
|
||
|
|
"PCW_MIO_36_IOTYPE": {
|
||
|
|
"value": "LVCMOS 1.8V"
|
||
|
|
},
|
||
|
|
"PCW_MIO_36_PULLUP": {
|
||
|
|
"value": "enabled"
|
||
|
|
},
|
||
|
|
"PCW_MIO_36_SLEW": {
|
||
|
|
"value": "slow"
|
||
|
|
},
|
||
|
|
"PCW_MIO_37_IOTYPE": {
|
||
|
|
"value": "LVCMOS 1.8V"
|
||
|
|
},
|
||
|
|
"PCW_MIO_37_PULLUP": {
|
||
|
|
"value": "enabled"
|
||
|
|
},
|
||
|
|
"PCW_MIO_37_SLEW": {
|
||
|
|
"value": "slow"
|
||
|
|
},
|
||
|
|
"PCW_MIO_38_IOTYPE": {
|
||
|
|
"value": "LVCMOS 1.8V"
|
||
|
|
},
|
||
|
|
"PCW_MIO_38_PULLUP": {
|
||
|
|
"value": "enabled"
|
||
|
|
},
|
||
|
|
"PCW_MIO_38_SLEW": {
|
||
|
|
"value": "slow"
|
||
|
|
},
|
||
|
|
"PCW_MIO_39_IOTYPE": {
|
||
|
|
"value": "LVCMOS 1.8V"
|
||
|
|
},
|
||
|
|
"PCW_MIO_39_PULLUP": {
|
||
|
|
"value": "enabled"
|
||
|
|
},
|
||
|
|
"PCW_MIO_39_SLEW": {
|
||
|
|
"value": "slow"
|
||
|
|
},
|
||
|
|
"PCW_MIO_3_IOTYPE": {
|
||
|
|
"value": "LVCMOS 3.3V"
|
||
|
|
},
|
||
|
|
"PCW_MIO_3_SLEW": {
|
||
|
|
"value": "slow"
|
||
|
|
},
|
||
|
|
"PCW_MIO_40_IOTYPE": {
|
||
|
|
"value": "LVCMOS 1.8V"
|
||
|
|
},
|
||
|
|
"PCW_MIO_40_PULLUP": {
|
||
|
|
"value": "enabled"
|
||
|
|
},
|
||
|
|
"PCW_MIO_40_SLEW": {
|
||
|
|
"value": "slow"
|
||
|
|
},
|
||
|
|
"PCW_MIO_41_IOTYPE": {
|
||
|
|
"value": "LVCMOS 1.8V"
|
||
|
|
},
|
||
|
|
"PCW_MIO_41_PULLUP": {
|
||
|
|
"value": "enabled"
|
||
|
|
},
|
||
|
|
"PCW_MIO_41_SLEW": {
|
||
|
|
"value": "slow"
|
||
|
|
},
|
||
|
|
"PCW_MIO_42_IOTYPE": {
|
||
|
|
"value": "LVCMOS 1.8V"
|
||
|
|
},
|
||
|
|
"PCW_MIO_42_PULLUP": {
|
||
|
|
"value": "enabled"
|
||
|
|
},
|
||
|
|
"PCW_MIO_42_SLEW": {
|
||
|
|
"value": "slow"
|
||
|
|
},
|
||
|
|
"PCW_MIO_43_IOTYPE": {
|
||
|
|
"value": "LVCMOS 1.8V"
|
||
|
|
},
|
||
|
|
"PCW_MIO_43_PULLUP": {
|
||
|
|
"value": "enabled"
|
||
|
|
},
|
||
|
|
"PCW_MIO_43_SLEW": {
|
||
|
|
"value": "slow"
|
||
|
|
},
|
||
|
|
"PCW_MIO_44_IOTYPE": {
|
||
|
|
"value": "LVCMOS 1.8V"
|
||
|
|
},
|
||
|
|
"PCW_MIO_44_PULLUP": {
|
||
|
|
"value": "enabled"
|
||
|
|
},
|
||
|
|
"PCW_MIO_44_SLEW": {
|
||
|
|
"value": "slow"
|
||
|
|
},
|
||
|
|
"PCW_MIO_45_IOTYPE": {
|
||
|
|
"value": "LVCMOS 1.8V"
|
||
|
|
},
|
||
|
|
"PCW_MIO_45_PULLUP": {
|
||
|
|
"value": "enabled"
|
||
|
|
},
|
||
|
|
"PCW_MIO_45_SLEW": {
|
||
|
|
"value": "slow"
|
||
|
|
},
|
||
|
|
"PCW_MIO_46_IOTYPE": {
|
||
|
|
"value": "LVCMOS 1.8V"
|
||
|
|
},
|
||
|
|
"PCW_MIO_46_PULLUP": {
|
||
|
|
"value": "enabled"
|
||
|
|
},
|
||
|
|
"PCW_MIO_46_SLEW": {
|
||
|
|
"value": "slow"
|
||
|
|
},
|
||
|
|
"PCW_MIO_47_IOTYPE": {
|
||
|
|
"value": "LVCMOS 1.8V"
|
||
|
|
},
|
||
|
|
"PCW_MIO_47_PULLUP": {
|
||
|
|
"value": "enabled"
|
||
|
|
},
|
||
|
|
"PCW_MIO_47_SLEW": {
|
||
|
|
"value": "slow"
|
||
|
|
},
|
||
|
|
"PCW_MIO_48_IOTYPE": {
|
||
|
|
"value": "LVCMOS 1.8V"
|
||
|
|
},
|
||
|
|
"PCW_MIO_48_PULLUP": {
|
||
|
|
"value": "enabled"
|
||
|
|
},
|
||
|
|
"PCW_MIO_48_SLEW": {
|
||
|
|
"value": "slow"
|
||
|
|
},
|
||
|
|
"PCW_MIO_49_IOTYPE": {
|
||
|
|
"value": "LVCMOS 1.8V"
|
||
|
|
},
|
||
|
|
"PCW_MIO_49_PULLUP": {
|
||
|
|
"value": "enabled"
|
||
|
|
},
|
||
|
|
"PCW_MIO_49_SLEW": {
|
||
|
|
"value": "slow"
|
||
|
|
},
|
||
|
|
"PCW_MIO_4_IOTYPE": {
|
||
|
|
"value": "LVCMOS 3.3V"
|
||
|
|
},
|
||
|
|
"PCW_MIO_4_SLEW": {
|
||
|
|
"value": "slow"
|
||
|
|
},
|
||
|
|
"PCW_MIO_50_IOTYPE": {
|
||
|
|
"value": "LVCMOS 1.8V"
|
||
|
|
},
|
||
|
|
"PCW_MIO_50_PULLUP": {
|
||
|
|
"value": "enabled"
|
||
|
|
},
|
||
|
|
"PCW_MIO_50_SLEW": {
|
||
|
|
"value": "slow"
|
||
|
|
},
|
||
|
|
"PCW_MIO_51_IOTYPE": {
|
||
|
|
"value": "LVCMOS 1.8V"
|
||
|
|
},
|
||
|
|
"PCW_MIO_51_PULLUP": {
|
||
|
|
"value": "enabled"
|
||
|
|
},
|
||
|
|
"PCW_MIO_51_SLEW": {
|
||
|
|
"value": "slow"
|
||
|
|
},
|
||
|
|
"PCW_MIO_52_IOTYPE": {
|
||
|
|
"value": "LVCMOS 1.8V"
|
||
|
|
},
|
||
|
|
"PCW_MIO_52_PULLUP": {
|
||
|
|
"value": "enabled"
|
||
|
|
},
|
||
|
|
"PCW_MIO_52_SLEW": {
|
||
|
|
"value": "slow"
|
||
|
|
},
|
||
|
|
"PCW_MIO_53_IOTYPE": {
|
||
|
|
"value": "LVCMOS 1.8V"
|
||
|
|
},
|
||
|
|
"PCW_MIO_53_PULLUP": {
|
||
|
|
"value": "enabled"
|
||
|
|
},
|
||
|
|
"PCW_MIO_53_SLEW": {
|
||
|
|
"value": "slow"
|
||
|
|
},
|
||
|
|
"PCW_MIO_5_IOTYPE": {
|
||
|
|
"value": "LVCMOS 3.3V"
|
||
|
|
},
|
||
|
|
"PCW_MIO_5_SLEW": {
|
||
|
|
"value": "slow"
|
||
|
|
},
|
||
|
|
"PCW_MIO_6_IOTYPE": {
|
||
|
|
"value": "LVCMOS 3.3V"
|
||
|
|
},
|
||
|
|
"PCW_MIO_6_SLEW": {
|
||
|
|
"value": "slow"
|
||
|
|
},
|
||
|
|
"PCW_MIO_7_IOTYPE": {
|
||
|
|
"value": "LVCMOS 3.3V"
|
||
|
|
},
|
||
|
|
"PCW_MIO_7_SLEW": {
|
||
|
|
"value": "slow"
|
||
|
|
},
|
||
|
|
"PCW_MIO_8_IOTYPE": {
|
||
|
|
"value": "LVCMOS 3.3V"
|
||
|
|
},
|
||
|
|
"PCW_MIO_8_SLEW": {
|
||
|
|
"value": "slow"
|
||
|
|
},
|
||
|
|
"PCW_MIO_9_IOTYPE": {
|
||
|
|
"value": "LVCMOS 3.3V"
|
||
|
|
},
|
||
|
|
"PCW_MIO_9_PULLUP": {
|
||
|
|
"value": "enabled"
|
||
|
|
},
|
||
|
|
"PCW_MIO_9_SLEW": {
|
||
|
|
"value": "slow"
|
||
|
|
},
|
||
|
|
"PCW_MIO_PRIMITIVE": {
|
||
|
|
"value": "54"
|
||
|
|
},
|
||
|
|
"PCW_MIO_TREE_PERIPHERALS": {
|
||
|
|
"value": [
|
||
|
|
"GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#SD 1#SD 1#SD 1#SD 1#SD 1#SD 1#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet",
|
||
|
|
"0#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#USB 1#USB 1#USB 1#USB 1#USB 1#USB 1#USB 1#USB 1#USB 1#USB 1#USB 1#USB 1#Enet 0#Enet 0"
|
||
|
|
]
|
||
|
|
},
|
||
|
|
"PCW_MIO_TREE_SIGNALS": {
|
||
|
|
"value": "gpio[0]#gpio[1]#gpio[2]#gpio[3]#gpio[4]#gpio[5]#gpio[6]#gpio[7]#gpio[8]#gpio[9]#data[0]#cmd#clk#data[1]#data[2]#data[3]#tx_clk#txd[0]#txd[1]#txd[2]#txd[3]#tx_ctl#rx_clk#rxd[0]#rxd[1]#rxd[2]#rxd[3]#rx_ctl#gpio[28]#gpio[29]#gpio[30]#gpio[31]#gpio[32]#gpio[33]#gpio[34]#gpio[35]#gpio[36]#gpio[37]#gpio[38]#gpio[39]#data[4]#dir#stp#nxt#data[0]#data[1]#data[2]#data[3]#clk#data[5]#data[6]#data[7]#mdc#mdio"
|
||
|
|
},
|
||
|
|
"PCW_NAND_CYCLES_T_AR": {
|
||
|
|
"value": "1"
|
||
|
|
},
|
||
|
|
"PCW_NAND_CYCLES_T_CLR": {
|
||
|
|
"value": "1"
|
||
|
|
},
|
||
|
|
"PCW_NAND_CYCLES_T_RC": {
|
||
|
|
"value": "11"
|
||
|
|
},
|
||
|
|
"PCW_NAND_CYCLES_T_REA": {
|
||
|
|
"value": "1"
|
||
|
|
},
|
||
|
|
"PCW_NAND_CYCLES_T_RR": {
|
||
|
|
"value": "1"
|
||
|
|
},
|
||
|
|
"PCW_NAND_CYCLES_T_WC": {
|
||
|
|
"value": "11"
|
||
|
|
},
|
||
|
|
"PCW_NAND_CYCLES_T_WP": {
|
||
|
|
"value": "1"
|
||
|
|
},
|
||
|
|
"PCW_NAND_PERIPHERAL_ENABLE": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_NOR_CS0_T_CEOE": {
|
||
|
|
"value": "1"
|
||
|
|
},
|
||
|
|
"PCW_NOR_CS0_T_PC": {
|
||
|
|
"value": "1"
|
||
|
|
},
|
||
|
|
"PCW_NOR_CS0_T_RC": {
|
||
|
|
"value": "11"
|
||
|
|
},
|
||
|
|
"PCW_NOR_CS0_T_TR": {
|
||
|
|
"value": "1"
|
||
|
|
},
|
||
|
|
"PCW_NOR_CS0_T_WC": {
|
||
|
|
"value": "11"
|
||
|
|
},
|
||
|
|
"PCW_NOR_CS0_T_WP": {
|
||
|
|
"value": "1"
|
||
|
|
},
|
||
|
|
"PCW_NOR_CS0_WE_TIME": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_NOR_CS1_T_CEOE": {
|
||
|
|
"value": "1"
|
||
|
|
},
|
||
|
|
"PCW_NOR_CS1_T_PC": {
|
||
|
|
"value": "1"
|
||
|
|
},
|
||
|
|
"PCW_NOR_CS1_T_RC": {
|
||
|
|
"value": "11"
|
||
|
|
},
|
||
|
|
"PCW_NOR_CS1_T_TR": {
|
||
|
|
"value": "1"
|
||
|
|
},
|
||
|
|
"PCW_NOR_CS1_T_WC": {
|
||
|
|
"value": "11"
|
||
|
|
},
|
||
|
|
"PCW_NOR_CS1_T_WP": {
|
||
|
|
"value": "1"
|
||
|
|
},
|
||
|
|
"PCW_NOR_CS1_WE_TIME": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_NOR_PERIPHERAL_ENABLE": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_NOR_SRAM_CS0_T_CEOE": {
|
||
|
|
"value": "1"
|
||
|
|
},
|
||
|
|
"PCW_NOR_SRAM_CS0_T_PC": {
|
||
|
|
"value": "1"
|
||
|
|
},
|
||
|
|
"PCW_NOR_SRAM_CS0_T_RC": {
|
||
|
|
"value": "11"
|
||
|
|
},
|
||
|
|
"PCW_NOR_SRAM_CS0_T_TR": {
|
||
|
|
"value": "1"
|
||
|
|
},
|
||
|
|
"PCW_NOR_SRAM_CS0_T_WC": {
|
||
|
|
"value": "11"
|
||
|
|
},
|
||
|
|
"PCW_NOR_SRAM_CS0_T_WP": {
|
||
|
|
"value": "1"
|
||
|
|
},
|
||
|
|
"PCW_NOR_SRAM_CS0_WE_TIME": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_NOR_SRAM_CS1_T_CEOE": {
|
||
|
|
"value": "1"
|
||
|
|
},
|
||
|
|
"PCW_NOR_SRAM_CS1_T_PC": {
|
||
|
|
"value": "1"
|
||
|
|
},
|
||
|
|
"PCW_NOR_SRAM_CS1_T_RC": {
|
||
|
|
"value": "11"
|
||
|
|
},
|
||
|
|
"PCW_NOR_SRAM_CS1_T_TR": {
|
||
|
|
"value": "1"
|
||
|
|
},
|
||
|
|
"PCW_NOR_SRAM_CS1_T_WC": {
|
||
|
|
"value": "11"
|
||
|
|
},
|
||
|
|
"PCW_NOR_SRAM_CS1_T_WP": {
|
||
|
|
"value": "1"
|
||
|
|
},
|
||
|
|
"PCW_NOR_SRAM_CS1_WE_TIME": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_OVERRIDE_BASIC_CLOCK": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_PACKAGE_DDR_BOARD_DELAY0": {
|
||
|
|
"value": "0.080"
|
||
|
|
},
|
||
|
|
"PCW_PACKAGE_DDR_BOARD_DELAY1": {
|
||
|
|
"value": "0.063"
|
||
|
|
},
|
||
|
|
"PCW_PACKAGE_DDR_BOARD_DELAY2": {
|
||
|
|
"value": "0.057"
|
||
|
|
},
|
||
|
|
"PCW_PACKAGE_DDR_BOARD_DELAY3": {
|
||
|
|
"value": "0.068"
|
||
|
|
},
|
||
|
|
"PCW_PACKAGE_DDR_DQS_TO_CLK_DELAY_0": {
|
||
|
|
"value": "-0.047"
|
||
|
|
},
|
||
|
|
"PCW_PACKAGE_DDR_DQS_TO_CLK_DELAY_1": {
|
||
|
|
"value": "-0.025"
|
||
|
|
},
|
||
|
|
"PCW_PACKAGE_DDR_DQS_TO_CLK_DELAY_2": {
|
||
|
|
"value": "-0.006"
|
||
|
|
},
|
||
|
|
"PCW_PACKAGE_DDR_DQS_TO_CLK_DELAY_3": {
|
||
|
|
"value": "-0.017"
|
||
|
|
},
|
||
|
|
"PCW_PACKAGE_NAME": {
|
||
|
|
"value": "clg400"
|
||
|
|
},
|
||
|
|
"PCW_PCAP_PERIPHERAL_CLKSRC": {
|
||
|
|
"value": "IO PLL"
|
||
|
|
},
|
||
|
|
"PCW_PCAP_PERIPHERAL_FREQMHZ": {
|
||
|
|
"value": "200"
|
||
|
|
},
|
||
|
|
"PCW_PERIPHERAL_BOARD_PRESET": {
|
||
|
|
"value": "None"
|
||
|
|
},
|
||
|
|
"PCW_PJTAG_PERIPHERAL_ENABLE": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_PLL_BYPASSMODE_ENABLE": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_PRESET_BANK0_VOLTAGE": {
|
||
|
|
"value": "LVCMOS 3.3V"
|
||
|
|
},
|
||
|
|
"PCW_PRESET_BANK1_VOLTAGE": {
|
||
|
|
"value": "LVCMOS 1.8V"
|
||
|
|
},
|
||
|
|
"PCW_PS7_SI_REV": {
|
||
|
|
"value": "PRODUCTION"
|
||
|
|
},
|
||
|
|
"PCW_QSPI_INTERNAL_HIGHADDRESS": {
|
||
|
|
"value": "0xFCFFFFFF"
|
||
|
|
},
|
||
|
|
"PCW_QSPI_PERIPHERAL_CLKSRC": {
|
||
|
|
"value": "IO PLL"
|
||
|
|
},
|
||
|
|
"PCW_QSPI_PERIPHERAL_ENABLE": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_SD0_PERIPHERAL_ENABLE": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_SD1_GRP_CD_ENABLE": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_SD1_GRP_POW_ENABLE": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_SD1_GRP_WP_ENABLE": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_SD1_PERIPHERAL_ENABLE": {
|
||
|
|
"value": "1"
|
||
|
|
},
|
||
|
|
"PCW_SD1_SD1_IO": {
|
||
|
|
"value": "MIO 10 .. 15"
|
||
|
|
},
|
||
|
|
"PCW_SDIO1_BASEADDR": {
|
||
|
|
"value": "0xE0101000"
|
||
|
|
},
|
||
|
|
"PCW_SDIO1_HIGHADDR": {
|
||
|
|
"value": "0xE0101FFF"
|
||
|
|
},
|
||
|
|
"PCW_SDIO_PERIPHERAL_CLKSRC": {
|
||
|
|
"value": "IO PLL"
|
||
|
|
},
|
||
|
|
"PCW_SDIO_PERIPHERAL_FREQMHZ": {
|
||
|
|
"value": "100"
|
||
|
|
},
|
||
|
|
"PCW_SDIO_PERIPHERAL_VALID": {
|
||
|
|
"value": "1"
|
||
|
|
},
|
||
|
|
"PCW_SMC_CYCLE_T0": {
|
||
|
|
"value": "NA"
|
||
|
|
},
|
||
|
|
"PCW_SMC_CYCLE_T1": {
|
||
|
|
"value": "NA"
|
||
|
|
},
|
||
|
|
"PCW_SMC_CYCLE_T2": {
|
||
|
|
"value": "NA"
|
||
|
|
},
|
||
|
|
"PCW_SMC_CYCLE_T3": {
|
||
|
|
"value": "NA"
|
||
|
|
},
|
||
|
|
"PCW_SMC_CYCLE_T4": {
|
||
|
|
"value": "NA"
|
||
|
|
},
|
||
|
|
"PCW_SMC_CYCLE_T5": {
|
||
|
|
"value": "NA"
|
||
|
|
},
|
||
|
|
"PCW_SMC_CYCLE_T6": {
|
||
|
|
"value": "NA"
|
||
|
|
},
|
||
|
|
"PCW_SMC_PERIPHERAL_CLKSRC": {
|
||
|
|
"value": "IO PLL"
|
||
|
|
},
|
||
|
|
"PCW_SMC_PERIPHERAL_VALID": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_SPI0_PERIPHERAL_ENABLE": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_SPI1_PERIPHERAL_ENABLE": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_SPI_PERIPHERAL_CLKSRC": {
|
||
|
|
"value": "IO PLL"
|
||
|
|
},
|
||
|
|
"PCW_SPI_PERIPHERAL_VALID": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_TPIU_PERIPHERAL_CLKSRC": {
|
||
|
|
"value": "External"
|
||
|
|
},
|
||
|
|
"PCW_TRACE_INTERNAL_WIDTH": {
|
||
|
|
"value": "2"
|
||
|
|
},
|
||
|
|
"PCW_TRACE_PERIPHERAL_ENABLE": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_TTC0_CLK0_PERIPHERAL_CLKSRC": {
|
||
|
|
"value": "CPU_1X"
|
||
|
|
},
|
||
|
|
"PCW_TTC0_CLK0_PERIPHERAL_DIVISOR0": {
|
||
|
|
"value": "1"
|
||
|
|
},
|
||
|
|
"PCW_TTC0_CLK1_PERIPHERAL_CLKSRC": {
|
||
|
|
"value": "CPU_1X"
|
||
|
|
},
|
||
|
|
"PCW_TTC0_CLK1_PERIPHERAL_DIVISOR0": {
|
||
|
|
"value": "1"
|
||
|
|
},
|
||
|
|
"PCW_TTC0_CLK2_PERIPHERAL_CLKSRC": {
|
||
|
|
"value": "CPU_1X"
|
||
|
|
},
|
||
|
|
"PCW_TTC0_CLK2_PERIPHERAL_DIVISOR0": {
|
||
|
|
"value": "1"
|
||
|
|
},
|
||
|
|
"PCW_TTC0_PERIPHERAL_ENABLE": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_TTC1_CLK0_PERIPHERAL_CLKSRC": {
|
||
|
|
"value": "CPU_1X"
|
||
|
|
},
|
||
|
|
"PCW_TTC1_CLK0_PERIPHERAL_DIVISOR0": {
|
||
|
|
"value": "1"
|
||
|
|
},
|
||
|
|
"PCW_TTC1_CLK1_PERIPHERAL_CLKSRC": {
|
||
|
|
"value": "CPU_1X"
|
||
|
|
},
|
||
|
|
"PCW_TTC1_CLK1_PERIPHERAL_DIVISOR0": {
|
||
|
|
"value": "1"
|
||
|
|
},
|
||
|
|
"PCW_TTC1_CLK2_PERIPHERAL_CLKSRC": {
|
||
|
|
"value": "CPU_1X"
|
||
|
|
},
|
||
|
|
"PCW_TTC1_CLK2_PERIPHERAL_DIVISOR0": {
|
||
|
|
"value": "1"
|
||
|
|
},
|
||
|
|
"PCW_TTC1_PERIPHERAL_ENABLE": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_UART0_BASEADDR": {
|
||
|
|
"value": "0xE0000000"
|
||
|
|
},
|
||
|
|
"PCW_UART0_BAUD_RATE": {
|
||
|
|
"value": "115200"
|
||
|
|
},
|
||
|
|
"PCW_UART0_GRP_FULL_ENABLE": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_UART0_HIGHADDR": {
|
||
|
|
"value": "0xE0000FFF"
|
||
|
|
},
|
||
|
|
"PCW_UART0_PERIPHERAL_ENABLE": {
|
||
|
|
"value": "1"
|
||
|
|
},
|
||
|
|
"PCW_UART0_UART0_IO": {
|
||
|
|
"value": "EMIO"
|
||
|
|
},
|
||
|
|
"PCW_UART1_PERIPHERAL_ENABLE": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_UART_PERIPHERAL_CLKSRC": {
|
||
|
|
"value": "IO PLL"
|
||
|
|
},
|
||
|
|
"PCW_UART_PERIPHERAL_FREQMHZ": {
|
||
|
|
"value": "100"
|
||
|
|
},
|
||
|
|
"PCW_UART_PERIPHERAL_VALID": {
|
||
|
|
"value": "1"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_ACT_DDR_FREQ_MHZ": {
|
||
|
|
"value": "533.333374"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_ADV_ENABLE": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_AL": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_BL": {
|
||
|
|
"value": "8"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_BOARD_DELAY0": {
|
||
|
|
"value": "0.25"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_BOARD_DELAY1": {
|
||
|
|
"value": "0.25"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_BOARD_DELAY2": {
|
||
|
|
"value": "0.25"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_BOARD_DELAY3": {
|
||
|
|
"value": "0.25"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_BUS_WIDTH": {
|
||
|
|
"value": "32 Bit"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_CLOCK_0_LENGTH_MM": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_CLOCK_0_PACKAGE_LENGTH": {
|
||
|
|
"value": "54.563"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_CLOCK_0_PROPOGATION_DELAY": {
|
||
|
|
"value": "160"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_CLOCK_1_LENGTH_MM": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_CLOCK_1_PACKAGE_LENGTH": {
|
||
|
|
"value": "54.563"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_CLOCK_1_PROPOGATION_DELAY": {
|
||
|
|
"value": "160"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_CLOCK_2_LENGTH_MM": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_CLOCK_2_PACKAGE_LENGTH": {
|
||
|
|
"value": "54.563"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_CLOCK_2_PROPOGATION_DELAY": {
|
||
|
|
"value": "160"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_CLOCK_3_LENGTH_MM": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_CLOCK_3_PACKAGE_LENGTH": {
|
||
|
|
"value": "54.563"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_CLOCK_3_PROPOGATION_DELAY": {
|
||
|
|
"value": "160"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_CLOCK_STOP_EN": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_DQS_0_LENGTH_MM": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_DQS_0_PACKAGE_LENGTH": {
|
||
|
|
"value": "101.239"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_DQS_0_PROPOGATION_DELAY": {
|
||
|
|
"value": "160"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_DQS_1_LENGTH_MM": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_DQS_1_PACKAGE_LENGTH": {
|
||
|
|
"value": "79.5025"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_DQS_1_PROPOGATION_DELAY": {
|
||
|
|
"value": "160"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_DQS_2_LENGTH_MM": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_DQS_2_PACKAGE_LENGTH": {
|
||
|
|
"value": "60.536"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_DQS_2_PROPOGATION_DELAY": {
|
||
|
|
"value": "160"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_DQS_3_LENGTH_MM": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_DQS_3_PACKAGE_LENGTH": {
|
||
|
|
"value": "71.7715"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_DQS_3_PROPOGATION_DELAY": {
|
||
|
|
"value": "160"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_0": {
|
||
|
|
"value": "0.0"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_1": {
|
||
|
|
"value": "0.0"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_2": {
|
||
|
|
"value": "0.0"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_3": {
|
||
|
|
"value": "0.0"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_DQ_0_LENGTH_MM": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_DQ_0_PACKAGE_LENGTH": {
|
||
|
|
"value": "104.5365"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_DQ_0_PROPOGATION_DELAY": {
|
||
|
|
"value": "160"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_DQ_1_LENGTH_MM": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_DQ_1_PACKAGE_LENGTH": {
|
||
|
|
"value": "70.676"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_DQ_1_PROPOGATION_DELAY": {
|
||
|
|
"value": "160"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_DQ_2_LENGTH_MM": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_DQ_2_PACKAGE_LENGTH": {
|
||
|
|
"value": "59.1615"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_DQ_2_PROPOGATION_DELAY": {
|
||
|
|
"value": "160"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_DQ_3_LENGTH_MM": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_DQ_3_PACKAGE_LENGTH": {
|
||
|
|
"value": "81.319"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_DQ_3_PROPOGATION_DELAY": {
|
||
|
|
"value": "160"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_ENABLE": {
|
||
|
|
"value": "1"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_FREQ_MHZ": {
|
||
|
|
"value": "533.333333"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_HIGH_TEMP": {
|
||
|
|
"value": "Normal (0-85)"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_MEMORY_TYPE": {
|
||
|
|
"value": "DDR 3"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_PARTNO": {
|
||
|
|
"value": "MT41K256M16 RE-125"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_TRAIN_DATA_EYE": {
|
||
|
|
"value": "1"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_TRAIN_READ_GATE": {
|
||
|
|
"value": "1"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_TRAIN_WRITE_LEVEL": {
|
||
|
|
"value": "1"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_DDR_USE_INTERNAL_VREF": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_UIPARAM_GENERATE_SUMMARY": {
|
||
|
|
"value": "NA"
|
||
|
|
},
|
||
|
|
"PCW_USB0_PERIPHERAL_ENABLE": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_USB0_RESET_ENABLE": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_USB1_BASEADDR": {
|
||
|
|
"value": "0xE0103000"
|
||
|
|
},
|
||
|
|
"PCW_USB1_HIGHADDR": {
|
||
|
|
"value": "0xE0103fff"
|
||
|
|
},
|
||
|
|
"PCW_USB1_PERIPHERAL_ENABLE": {
|
||
|
|
"value": "1"
|
||
|
|
},
|
||
|
|
"PCW_USB1_USB1_IO": {
|
||
|
|
"value": "MIO 40 .. 51"
|
||
|
|
},
|
||
|
|
"PCW_USB_RESET_ENABLE": {
|
||
|
|
"value": "1"
|
||
|
|
},
|
||
|
|
"PCW_USB_RESET_POLARITY": {
|
||
|
|
"value": "Active Low"
|
||
|
|
},
|
||
|
|
"PCW_USB_RESET_SELECT": {
|
||
|
|
"value": "Share reset pin"
|
||
|
|
},
|
||
|
|
"PCW_USE_AXI_FABRIC_IDLE": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_USE_AXI_NONSECURE": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_USE_CORESIGHT": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_USE_CROSS_TRIGGER": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_USE_CR_FABRIC": {
|
||
|
|
"value": "1"
|
||
|
|
},
|
||
|
|
"PCW_USE_DDR_BYPASS": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_USE_DEBUG": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_USE_DMA0": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_USE_DMA1": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_USE_DMA2": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_USE_DMA3": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_USE_EXPANDED_IOP": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_USE_FABRIC_INTERRUPT": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_USE_HIGH_OCM": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_USE_M_AXI_GP0": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_USE_M_AXI_GP1": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_USE_PROC_EVENT_BUS": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_USE_PS_SLCR_REGISTERS": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_USE_S_AXI_ACP": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_USE_S_AXI_GP0": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_USE_S_AXI_GP1": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_USE_S_AXI_HP0": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_USE_S_AXI_HP1": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_USE_S_AXI_HP2": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_USE_S_AXI_HP3": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_USE_TRACE": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"PCW_VALUE_SILVERSION": {
|
||
|
|
"value": "3"
|
||
|
|
},
|
||
|
|
"PCW_WDT_PERIPHERAL_CLKSRC": {
|
||
|
|
"value": "CPU_1X"
|
||
|
|
},
|
||
|
|
"PCW_WDT_PERIPHERAL_DIVISOR0": {
|
||
|
|
"value": "1"
|
||
|
|
},
|
||
|
|
"PCW_WDT_PERIPHERAL_ENABLE": {
|
||
|
|
"value": "0"
|
||
|
|
},
|
||
|
|
"preset": {
|
||
|
|
"value": "None"
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
},
|
||
|
|
"interface_nets": {
|
||
|
|
"processing_system7_0_DDR": {
|
||
|
|
"interface_ports": [
|
||
|
|
"DDR",
|
||
|
|
"processing_system7_0/DDR"
|
||
|
|
]
|
||
|
|
},
|
||
|
|
"processing_system7_0_FIXED_IO": {
|
||
|
|
"interface_ports": [
|
||
|
|
"FIXED_IO",
|
||
|
|
"processing_system7_0/FIXED_IO"
|
||
|
|
]
|
||
|
|
},
|
||
|
|
"processing_system7_0_UART_0": {
|
||
|
|
"interface_ports": [
|
||
|
|
"UART",
|
||
|
|
"processing_system7_0/UART_0"
|
||
|
|
]
|
||
|
|
}
|
||
|
|
},
|
||
|
|
"nets": {
|
||
|
|
"processing_system7_0_FCLK_CLK0": {
|
||
|
|
"ports": [
|
||
|
|
"processing_system7_0/FCLK_CLK0",
|
||
|
|
"clk_axi"
|
||
|
|
]
|
||
|
|
},
|
||
|
|
"processing_system7_0_FCLK_RESET0_N": {
|
||
|
|
"ports": [
|
||
|
|
"processing_system7_0/FCLK_RESET0_N",
|
||
|
|
"rstn_axi"
|
||
|
|
]
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|