Add Colorlight-FPGA-Projects

This commit is contained in:
Colin 2025-04-01 10:32:16 +08:00
parent afe4932c12
commit 0fbe2ff871
242 changed files with 1218277 additions and 0 deletions

View File

@ -0,0 +1,201 @@
Apache License
Version 2.0, January 2004
http://www.apache.org/licenses/
TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION
1. Definitions.
"License" shall mean the terms and conditions for use, reproduction,
and distribution as defined by Sections 1 through 9 of this document.
"Licensor" shall mean the copyright owner or entity authorized by
the copyright owner that is granting the License.
"Legal Entity" shall mean the union of the acting entity and all
other entities that control, are controlled by, or are under common
control with that entity. For the purposes of this definition,
"control" means (i) the power, direct or indirect, to cause the
direction or management of such entity, whether by contract or
otherwise, or (ii) ownership of fifty percent (50%) or more of the
outstanding shares, or (iii) beneficial ownership of such entity.
"You" (or "Your") shall mean an individual or Legal Entity
exercising permissions granted by this License.
"Source" form shall mean the preferred form for making modifications,
including but not limited to software source code, documentation
source, and configuration files.
"Object" form shall mean any form resulting from mechanical
transformation or translation of a Source form, including but
not limited to compiled object code, generated documentation,
and conversions to other media types.
"Work" shall mean the work of authorship, whether in Source or
Object form, made available under the License, as indicated by a
copyright notice that is included in or attached to the work
(an example is provided in the Appendix below).
"Derivative Works" shall mean any work, whether in Source or Object
form, that is based on (or derived from) the Work and for which the
editorial revisions, annotations, elaborations, or other modifications
represent, as a whole, an original work of authorship. For the purposes
of this License, Derivative Works shall not include works that remain
separable from, or merely link (or bind by name) to the interfaces of,
the Work and Derivative Works thereof.
"Contribution" shall mean any work of authorship, including
the original version of the Work and any modifications or additions
to that Work or Derivative Works thereof, that is intentionally
submitted to Licensor for inclusion in the Work by the copyright owner
or by an individual or Legal Entity authorized to submit on behalf of
the copyright owner. For the purposes of this definition, "submitted"
means any form of electronic, verbal, or written communication sent
to the Licensor or its representatives, including but not limited to
communication on electronic mailing lists, source code control systems,
and issue tracking systems that are managed by, or on behalf of, the
Licensor for the purpose of discussing and improving the Work, but
excluding communication that is conspicuously marked or otherwise
designated in writing by the copyright owner as "Not a Contribution."
"Contributor" shall mean Licensor and any individual or Legal Entity
on behalf of whom a Contribution has been received by Licensor and
subsequently incorporated within the Work.
2. Grant of Copyright License. Subject to the terms and conditions of
this License, each Contributor hereby grants to You a perpetual,
worldwide, non-exclusive, no-charge, royalty-free, irrevocable
copyright license to reproduce, prepare Derivative Works of,
publicly display, publicly perform, sublicense, and distribute the
Work and such Derivative Works in Source or Object form.
3. Grant of Patent License. Subject to the terms and conditions of
this License, each Contributor hereby grants to You a perpetual,
worldwide, non-exclusive, no-charge, royalty-free, irrevocable
(except as stated in this section) patent license to make, have made,
use, offer to sell, sell, import, and otherwise transfer the Work,
where such license applies only to those patent claims licensable
by such Contributor that are necessarily infringed by their
Contribution(s) alone or by combination of their Contribution(s)
with the Work to which such Contribution(s) was submitted. If You
institute patent litigation against any entity (including a
cross-claim or counterclaim in a lawsuit) alleging that the Work
or a Contribution incorporated within the Work constitutes direct
or contributory patent infringement, then any patent licenses
granted to You under this License for that Work shall terminate
as of the date such litigation is filed.
4. Redistribution. You may reproduce and distribute copies of the
Work or Derivative Works thereof in any medium, with or without
modifications, and in Source or Object form, provided that You
meet the following conditions:
(a) You must give any other recipients of the Work or
Derivative Works a copy of this License; and
(b) You must cause any modified files to carry prominent notices
stating that You changed the files; and
(c) You must retain, in the Source form of any Derivative Works
that You distribute, all copyright, patent, trademark, and
attribution notices from the Source form of the Work,
excluding those notices that do not pertain to any part of
the Derivative Works; and
(d) If the Work includes a "NOTICE" text file as part of its
distribution, then any Derivative Works that You distribute must
include a readable copy of the attribution notices contained
within such NOTICE file, excluding those notices that do not
pertain to any part of the Derivative Works, in at least one
of the following places: within a NOTICE text file distributed
as part of the Derivative Works; within the Source form or
documentation, if provided along with the Derivative Works; or,
within a display generated by the Derivative Works, if and
wherever such third-party notices normally appear. The contents
of the NOTICE file are for informational purposes only and
do not modify the License. You may add Your own attribution
notices within Derivative Works that You distribute, alongside
or as an addendum to the NOTICE text from the Work, provided
that such additional attribution notices cannot be construed
as modifying the License.
You may add Your own copyright statement to Your modifications and
may provide additional or different license terms and conditions
for use, reproduction, or distribution of Your modifications, or
for any such Derivative Works as a whole, provided Your use,
reproduction, and distribution of the Work otherwise complies with
the conditions stated in this License.
5. Submission of Contributions. Unless You explicitly state otherwise,
any Contribution intentionally submitted for inclusion in the Work
by You to the Licensor shall be under the terms and conditions of
this License, without any additional terms or conditions.
Notwithstanding the above, nothing herein shall supersede or modify
the terms of any separate license agreement you may have executed
with Licensor regarding such Contributions.
6. Trademarks. This License does not grant permission to use the trade
names, trademarks, service marks, or product names of the Licensor,
except as required for reasonable and customary use in describing the
origin of the Work and reproducing the content of the NOTICE file.
7. Disclaimer of Warranty. Unless required by applicable law or
agreed to in writing, Licensor provides the Work (and each
Contributor provides its Contributions) on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
implied, including, without limitation, any warranties or conditions
of TITLE, NON-INFRINGEMENT, MERCHANTABILITY, or FITNESS FOR A
PARTICULAR PURPOSE. You are solely responsible for determining the
appropriateness of using or redistributing the Work and assume any
risks associated with Your exercise of permissions under this License.
8. Limitation of Liability. In no event and under no legal theory,
whether in tort (including negligence), contract, or otherwise,
unless required by applicable law (such as deliberate and grossly
negligent acts) or agreed to in writing, shall any Contributor be
liable to You for damages, including any direct, indirect, special,
incidental, or consequential damages of any character arising as a
result of this License or out of the use or inability to use the
Work (including but not limited to damages for loss of goodwill,
work stoppage, computer failure or malfunction, or any and all
other commercial damages or losses), even if such Contributor
has been advised of the possibility of such damages.
9. Accepting Warranty or Additional Liability. While redistributing
the Work or Derivative Works thereof, You may choose to offer,
and charge a fee for, acceptance of support, warranty, indemnity,
or other liability obligations and/or rights consistent with this
License. However, in accepting such obligations, You may act only
on Your own behalf and on Your sole responsibility, not on behalf
of any other Contributor, and only if You agree to indemnify,
defend, and hold each Contributor harmless for any liability
incurred by, or claims asserted against, such Contributor by reason
of your accepting any such warranty or additional liability.
END OF TERMS AND CONDITIONS
APPENDIX: How to apply the Apache License to your work.
To apply the Apache License to your work, attach the following
boilerplate notice, with the fields enclosed by brackets "[]"
replaced with your own identifying information. (Don't include
the brackets!) The text should be enclosed in the appropriate
comment syntax for the file format. We also recommend that a
file or class name and description of purpose be included on the
same "printed page" as the copyright notice for easier
identification within third-party archives.
Copyright [yyyy] [name of copyright owner]
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.

View File

@ -0,0 +1,291 @@
# Colorlight-FPGA-Projects
* [Colorlight i5-v7.0](#colorlight-i5-v70)
* [Ext Board](#ext-board)
* [Component](#component)
* [Jtag](#jtag)
* [Clock](#clock)
* [LED](#led)
* [SPI-Flash](#spi-flash-u31)
* [DDR2 SODIMM 200P](#ddr2-sodimm-200p)
* [SDRAM](#sdram-u18)
* [ETH-PHY0](#eth-phy0-u28)
* [ETH-PHY1](#eth-phy1-u29)
* [How to Buy](#how-to-buy)
* [Reference](#reference)
some board & modules made by Colorlight are based on Lattice ECP5 series and Xilinx XC7 series, which are supported by open source toolchain (yosys & prjtrellis & nextpnr), can be used to make very interesting project.
current focus on Colorlight i5-v7.0 and i9-v7.2, i9plus-v6.1, check [get-start](./get-start.md) to see how to setup the env and program the bitstream.
the Colorlight i9-v7.2 contain a LFE5U-45F-6BG381, all GPIO already reversed, check [Colorlight i9-v7.2](colorlight_i9_v7.2.md) to see the detail.
the Colorlight i9plus-v6.1 contain a XC7A50T-FGG484, all GPIO already reversed, check [Colorlight i9plus-v6.1](colorlight_i9plus_v6.1.md) to see the detail.
## Colorlight i5-v7.0
![top](https://github.com/wuxx/Colorlight-FPGA-Projects/blob/master/doc/i5-top.jpg)
![bottom](https://github.com/wuxx/Colorlight-FPGA-Projects/blob/master/doc/i5-bottom.jpg)
## Ext-Board
![ext-board-1](https://github.com/wuxx/Colorlight-FPGA-Projects/blob/master/doc/ext-board-1.jpg)
![ext-board-2](https://github.com/wuxx/Colorlight-FPGA-Projects/blob/master/doc/ext-board-2.jpg)
![ext-board-pinout](https://github.com/wuxx/Colorlight-FPGA-Projects/blob/master/doc/i5_extboard_v1.2_pinout.png)
### Component
- FPGA
LFE5U-25F-6BG381C
- SDRAM
EM638325BK-6H 8MB
- SPI Flash
GD25Q16CSIG 2MB
- Ethernet PHY
1Gb Ethernet PHY Broadcom B50612D x 2
### JTAG
| Pin | Function |
|-----|----------|
| J27 | TCK |
| J31 | TMS |
| J32 | TDI |
| J30 | TDO |
### Clock
A 25Mhz clock is connected to FPGA with pin P3
### LED
| Pin | Function |
|-----|----------|
| U16 | D2 |
### SPI-FLASH (U31)
| Pin | Function |
|-----|----------|
| R2 | CS |
| V2 | MISO |
| W2 | MOSI |
| U3 | SCK |
### DDR2-SODIMM-200P
| Function | Top-Pin | Bot-Pin | Function |
|----------|---------|---------|----------|
| GND | 1 | 2 | 5V |
| GND | 3 | 4 | 5V |
| GND | 5 | 6 | 5V |
| GND | 7 | 8 | 5V |
| GND | 9 | 10 | 5V |
| GND | 11 | 12 | 5V |
| NC | 13 | 14 | NC |
| ETH1_1P| 15 | 16 | ETH2_1P|
| ETH1_1N| 17 | 18 | ETH2_1N|
| NC | 19 | 20 | NC |
| ETH1_2N| 21 | 22 | ETH2_2N|
| ETH1_2P| 23 | 24 | ETH2_2P|
| NC | 25 | 26 | NC |
| ETH1_3P| 27 | 28 | ETH2_3P|
| ETH1_3N| 29 | 30 | ETH2_3N|
| NC | 31 | 32 | NC |
| ETH1_4N| 33 | 34 | ETH2_4N|
| ETH1_4P| 35 | 36 | ETH2_4P|
| NC | 37 | 38 | NC |
| GND | 39 | 40 | GND |
| | | | |
| | | | |
| U16 | 41 | 42 | R1 |
| NC | 43 | 44 | T1 |
| NC | 45 | 46 | U1 |
| NC | 47 | 48 | Y2 |
| K18 | 49 | 50 | W1 |
| C18 | 51 | 52 | V1 |
| NC | 53 | 54 | M1 |
| GND | 55 | 56 | GND |
| T18 | 57 | 58 | N2 |
| R18 | 59 | 60 | N3 |
| R17 | 61 | 62 | T2 |
| P17 | 63 | 64 | M3 |
| M17 | 65 | 66 | T3 |
| T17 | 67 | 68 | R3 |
| U18 | 69 | 70 | N4 |
| U17 | 71 | 72 | M4 |
| P18 | 73 | 74 | L4 |
| N17 | 75 | 76 | L5 |
| N18 | 77 | 78 | P16 |
| M18 | 79 | 80 | J16 |
| L20 | 81 | 82 | J18 |
| L18 | 83 | 84 | J17 |
| K20 | 85 | 86 | H18 |
| K19 | 87 | 88 | H17 |
| J20 | 89 | 90 | G18 |
| J19 | 91 | 92 | H16 |
| H20 | 93 | 94 | F18 |
| G20 | 95 | 96 | G16 |
| G19 | 97 | 98 | E18 |
| F20 | 99 | 100 | F17 |
| F19 | 101 | 102 | F16 |
| E20 | 103 | 104 | E16 |
| GND | 105 | 106 | GND |
| GND | 107 | 108 | GND |
| E19 | 109 | 110 | E17 |
| D20 | 111 | 112 | D18 |
| D19 | 113 | 114 | D17 |
| C20 | 115 | 116 | G5 |
| B20 | 117 | 118 | D16 |
| B19 | 119 | 120 | F5 |
| B18 | 121 | 122 | E6 |
| A19 | 123 | 124 | E5 |
| C17 | 125 | 126 | F4 |
| A18 | 127 | 128 | E4 |
| D3 | 129 | 130 | F1 |
| C4 | 131 | 132 | F3 |
| B4 | 133 | 134 | G3 |
| C3 | 135 | 136 | H3 |
| E3 | 137 | 138 | H4 |
| A3 | 139 | 140 | H5 |
| C2 | 141 | 142 | J4 |
| B1 | 143 | 144 | J5 |
| C1 | 145 | 146 | K3 |
| D2 | 147 | 148 | K4 |
| D1 | 149 | 150 | K5 |
| E2 | 151 | 152 | B3 |
| E1 | 153 | 154 | A2 |
| F2 | 155 | 156 | B2 |
| GND | 157 | 158 | GND |
| NC | 159 | 160 | NC |
| NC | 161 | 162 | NC |
| NC | 163 | 164 | NC |
| NC | 165 | 166 | NC |
| NC | 167 | 168 | NC |
| NC | 169 | 170 | NC |
| NC | 171 | 172 | NC |
| NC | 173 | 174 | NC |
| NC | 175 | 176 | NC |
| NC | 177 | 178 | NC |
| NC | 179 | 180 | NC |
| NC | 181 | 182 | NC |
| NC | 183 | 184 | NC |
| NC | 185 | 186 | NC |
| NC | 187 | 188 | NC |
| NC | 189 | 190 | NC |
| NC | 191 | 192 | NC |
| NC | 193 | 194 | NC |
| NC | 195 | 196 | NC |
| NC | 197 | 198 | NC |
| GND | 199 | 200 | GND |
### SDRAM (U18)
| Pin | Function |
|-----|----------|
| B9 | CLK |
| VCC | CKE |
| GND | CS |
| B10 | RAS |
| A9 | CAS |
| A10 | WE |
| GND | DQM0 |
| GND | DQM1 |
| GND | DQM2 |
| GND | DQM3 |
| B11 | BA0 |
|(GND on v6.0; C8 on v7.0) | BA1 |
| B13 | A0 |
| C14 | A1 |
| A16 | A2 |
| A17 | A3 |
| B16 | A4 |
| B15 | A5 |
| A14 | A6 |
| A13 | A7 |
| A12 | A8 |
| A11 | A9 |
| B12 | A10 |
| B6 | DQ0 |
| A5 | DQ1 |
| A6 | DQ2 |
| A7 | DQ3 |
| C7 | DQ4 |
| B8 | DQ5 |
| B5 | DQ6 |
| A8 | DQ7 |
| D8 | DQ8 |
| D7 | DQ9 |
| E8 | DQ10 |
| D6 | DQ11 |
| C6 | DQ12 |
| D5 | DQ13 |
| E7 | DQ14 |
| C5 | DQ15 |
| C10 | DQ16 |
| D9 | DQ17 |
| E11 | DQ18 |
| D11 | DQ19 |
| C11 | DQ20 |
| D12 | DQ21 |
| E9 | DQ22 |
| C12 | DQ23 |
| E14 | DQ24 |
| C15 | DQ25 |
| E13 | DQ26 |
| D15 | DQ27 |
| E12 | DQ28 |
| B17 | DQ29 |
| D14 | DQ30 |
| D13 | DQ31 |
### ETH-PHY0 (U28)
| Pin | Function |
|-------|----------|
| N5 | MDC |
| P5 | MDIO |
| P4 | RESET |
| U19 | GTXCLK |
| U20 | TXD[0] |
| T19 | TXD[1] |
| T20 | TXD[2] |
| R20 | TXD[3] |
| P19 | TX_EN |
| L19 | RXC |
| P20 | RXD[0] |
| N19 | RXD[1] |
| N20 | RXD[2] |
| M19 | RXD[3] |
| M20 | RX_DV |
### ETH-PHY1 (U29)
| Pin | Function |
|-------|----------|
| N5 | MDC |
| P5 | MDIO |
| P4 | RESET |
| G1 | GTXCLK |
| G2 | TXD[0] |
| H1 | TXD[1] |
| J1 | TXD[2] |
| J3 | TXD[3] |
| K1 | TX_EN |
| H2 | RXC |
| K2 | RXD[0] |
| L1 | RXD[1] |
| N1 | RXD[2] |
| P1 | RXD[3] |
| P2 | RX_DV |
## How to Buy
you can buy Colorlight i5 and 5A-75B on our aliexpress store
[Colorlight i5 & i9](https://www.aliexpress.com/item/1005001686186007.html?spm=2114.12010615.8148356.1.3e035362vDqWtV)
[Colorlight i9plus](https://www.aliexpress.us/item/3256805434471000.html?spm=5261.ProductManageOnline.0.0.189c2ddbB6XS5T&gatewayAdapt=glo2usa4itemAdapt)
[Colorlight 5A-75B](https://www.aliexpress.com/item/1005001686175194.html?spm=2114.12010615.8148356.3.3e035362B6o2DO)
## reference
- chubby75
[https://github.com/q3k/chubby75](https://github.com/q3k/chubby75)
- Colorlight-5A-75B
[https://github.com/kholia/Colorlight-5A-75B](https://github.com/kholia/Colorlight-5A-75B)
- colorlight-i5-tips by kazkojima
[https://github.com/kazkojima/colorlight-i5-tips](https://github.com/kazkojima/colorlight-i5-tips)
- ulx3s_examples by lawrie
[https://github.com/lawrie/ulx3s_examples](https://github.com/lawrie/ulx3s_examples)
- ULX3S-Blinky by DoctorWkt
[https://github.com/DoctorWkt/ULX3S-Blinky](https://github.com/DoctorWkt/ULX3S-Blinky.git)
- litex without dram
[https://github.com/wuxx/litexOnColorlightLab004](https://github.com/wuxx/litexOnColorlightLab004)
- litex with dram
[https://github.com/ghent360/riscvOnColorlight-5A-75B](https://github.com/ghent360/riscvOnColorlight-5A-75B)
- litex with ethernet
[https://github.com/enjoy-digital/colorlite](https://github.com/enjoy-digital/colorlite)
- supported in IceStudio and Apio
[https://github.com/benitoss/ColorLight_FPGA_boards](https://github.com/benitoss/ColorLight_FPGA_boards)

View File

@ -0,0 +1,288 @@
# Colorlight-FPGA-Projects
* [Colorlight i9-v7.2](#colorlight-i9-v72)
* [Ext Board](#ext-board)
* [Component](#component)
* [Jtag](#jtag)
* [Clock](#clock)
* [LED](#led)
* [SPI-Flash](#spi-flash-u31)
* [DDR2 SODIMM 200P](#ddr2-sodimm-200p)
* [SDRAM](#sdram-u18)
* [ETH-PHY0](#eth-phy0-u28)
* [ETH-PHY1](#eth-phy1-u29)
* [How to Buy](#how-to-buy)
* [Reference](#reference)
i9-v7.2 GPIO layout is almost the same as i5, except for differences below:
- SODIMM-Pin-41 change from U16 to L2
- LED D2 change from U16 to L2 (shared with SODIMM-Pin-41)
## Colorlight i9-v7.2
![top](https://github.com/wuxx/Colorlight-FPGA-Projects/blob/master/doc/i9-v7.2-top.jpg)
![bottom](https://github.com/wuxx/Colorlight-FPGA-Projects/blob/master/doc/i9-v7.2-bottom.jpg)
## Ext-Board
![ext-board](https://github.com/wuxx/Colorlight-FPGA-Projects/blob/master/doc/i9-v7.2-2.jpg)
![ext-board-pinout](https://github.com/wuxx/Colorlight-FPGA-Projects/blob/master/doc/i9_v7.2_pinout.png)
### Component
- FPGA
LFE5U-45F-6BG381C
- SDRAM
M12L64322A 8MB SDRAM (512K x 32 Bit x 4 Banks)
- SPI Flash
W25Q64JVSIQ 8MB
- Ethernet PHY
1Gb Ethernet PHY Broadcom B50612D x 2
### JTAG
| Pin | Function |
|-----|----------|
| J27 | TCK |
| J31 | TMS |
| J32 | TDI |
| J30 | TDO |
### Clock
A 25Mhz clock is connected to FPGA with pin P3
### LED
| Pin | Function |
|-----|----------|
| L2 | D2 |
### SPI-FLASH (U31)
| Pin | Function |
|-----|----------|
| R2 | CS |
| V2 | MISO |
| W2 | MOSI |
| U3 | SCK |
### DDR2-SODIMM-200P
| Function | Top-Pin | Bot-Pin | Function |
|----------|---------|---------|----------|
| GND | 1 | 2 | 5V |
| GND | 3 | 4 | 5V |
| GND | 5 | 6 | 5V |
| GND | 7 | 8 | 5V |
| GND | 9 | 10 | 5V |
| GND | 11 | 12 | 5V |
| NC | 13 | 14 | NC |
| ETH1_1P| 15 | 16 | ETH2_1P|
| ETH1_1N| 17 | 18 | ETH2_1N|
| NC | 19 | 20 | NC |
| ETH1_2N| 21 | 22 | ETH2_2N|
| ETH1_2P| 23 | 24 | ETH2_2P|
| NC | 25 | 26 | NC |
| ETH1_3P| 27 | 28 | ETH2_3P|
| ETH1_3N| 29 | 30 | ETH2_3N|
| NC | 31 | 32 | NC |
| ETH1_4N| 33 | 34 | ETH2_4N|
| ETH1_4P| 35 | 36 | ETH2_4P|
| NC | 37 | 38 | NC |
| GND | 39 | 40 | GND |
| | | | |
| | | | |
| L2 | 41 | 42 | R1 |
| NC | 43 | 44 | T1 |
| NC | 45 | 46 | U1 |
| NC | 47 | 48 | Y2 |
| K18 | 49 | 50 | W1 |
| C18 | 51 | 52 | V1 |
| NC | 53 | 54 | M1 |
| GND | 55 | 56 | GND |
| T18 | 57 | 58 | N2 |
| R18 | 59 | 60 | N3 |
| R17 | 61 | 62 | T2 |
| P17 | 63 | 64 | M3 |
| M17 | 65 | 66 | T3 |
| T17 | 67 | 68 | R3 |
| U18 | 69 | 70 | N4 |
| U17 | 71 | 72 | M4 |
| P18 | 73 | 74 | L4 |
| N17 | 75 | 76 | L5 |
| N18 | 77 | 78 | P16 |
| M18 | 79 | 80 | J16 |
| L20 | 81 | 82 | J18 |
| L18 | 83 | 84 | J17 |
| K20 | 85 | 86 | H18 |
| K19 | 87 | 88 | H17 |
| J20 | 89 | 90 | G18 |
| J19 | 91 | 92 | H16 |
| H20 | 93 | 94 | F18 |
| G20 | 95 | 96 | G16 |
| G19 | 97 | 98 | E18 |
| F20 | 99 | 100 | F17 |
| F19 | 101 | 102 | F16 |
| E20 | 103 | 104 | E16 |
| GND | 105 | 106 | GND |
| GND | 107 | 108 | GND |
| E19 | 109 | 110 | E17 |
| D20 | 111 | 112 | D18 |
| D19 | 113 | 114 | D17 |
| C20 | 115 | 116 | G5 |
| B20 | 117 | 118 | D16 |
| B19 | 119 | 120 | F5 |
| B18 | 121 | 122 | E6 |
| A19 | 123 | 124 | E5 |
| C17 | 125 | 126 | F4 |
| A18 | 127 | 128 | E4 |
| D3 | 129 | 130 | F1 |
| C4 | 131 | 132 | F3 |
| B4 | 133 | 134 | G3 |
| C3 | 135 | 136 | H3 |
| E3 | 137 | 138 | H4 |
| A3 | 139 | 140 | H5 |
| C2 | 141 | 142 | J4 |
| B1 | 143 | 144 | J5 |
| C1 | 145 | 146 | K3 |
| D2 | 147 | 148 | K4 |
| D1 | 149 | 150 | K5 |
| E2 | 151 | 152 | B3 |
| E1 | 153 | 154 | A2 |
| F2 | 155 | 156 | B2 |
| GND | 157 | 158 | GND |
| NC | 159 | 160 | NC |
| NC | 161 | 162 | NC |
| NC | 163 | 164 | NC |
| NC | 165 | 166 | NC |
| NC | 167 | 168 | NC |
| NC | 169 | 170 | NC |
| NC | 171 | 172 | NC |
| NC | 173 | 174 | NC |
| NC | 175 | 176 | NC |
| NC | 177 | 178 | NC |
| NC | 179 | 180 | NC |
| NC | 181 | 182 | NC |
| NC | 183 | 184 | NC |
| NC | 185 | 186 | NC |
| NC | 187 | 188 | NC |
| NC | 189 | 190 | NC |
| NC | 191 | 192 | NC |
| NC | 193 | 194 | NC |
| NC | 195 | 196 | NC |
| NC | 197 | 198 | NC |
| GND | 199 | 200 | GND |
### SDRAM (U18)
| Pin | Function |
|-----|----------|
| B9 | CLK |
| VCC | CKE |
| GND | CS |
| B10 | RAS |
| A9 | CAS |
| A10 | WE |
| GND | DQM0 |
| GND | DQM1 |
| GND | DQM2 |
| GND | DQM3 |
| B11 | BA0 |
| C8 | BA |
| B13 | A0 |
| C14 | A1 |
| A16 | A2 |
| A17 | A3 |
| B16 | A4 |
| B15 | A5 |
| A14 | A6 |
| A13 | A7 |
| A12 | A8 |
| A11 | A9 |
| B12 | A10 |
| B6 | DQ0 |
| A5 | DQ1 |
| A6 | DQ2 |
| A7 | DQ3 |
| C7 | DQ4 |
| B8 | DQ5 |
| B5 | DQ6 |
| A8 | DQ7 |
| D8 | DQ8 |
| D7 | DQ9 |
| E8 | DQ10 |
| D6 | DQ11 |
| C6 | DQ12 |
| D5 | DQ13 |
| E7 | DQ14 |
| C5 | DQ15 |
| C10 | DQ16 |
| D9 | DQ17 |
| E11 | DQ18 |
| D11 | DQ19 |
| C11 | DQ20 |
| D12 | DQ21 |
| E9 | DQ22 |
| C12 | DQ23 |
| E14 | DQ24 |
| C15 | DQ25 |
| E13 | DQ26 |
| D15 | DQ27 |
| E12 | DQ28 |
| B17 | DQ29 |
| D14 | DQ30 |
| D13 | DQ31 |
### ETH-PHY0 (U29)
| Pin | Function |
|-------|----------|
| N5 | MDC |
| P5 | MDIO |
| P4 | RESET |
| U19 | GTXCLK |
| U20 | TXD[0] |
| T19 | TXD[1] |
| T20 | TXD[2] |
| R20 | TXD[3] |
| P19 | TX_EN |
| L19 | RXC |
| P20 | RXD[0] |
| N19 | RXD[1] |
| N20 | RXD[2] |
| M19 | RXD[3] |
| M20 | RX_DV |
### ETH-PHY1 (U30)
| Pin | Function |
|-------|----------|
| N5 | MDC |
| P5 | MDIO |
| P4 | RESET |
| G1 | GTXCLK |
| G2 | TXD[0] |
| H1 | TXD[1] |
| J1 | TXD[2] |
| J3 | TXD[3] |
| K1 | TX_EN |
| H2 | RXC |
| K2 | RXD[0] |
| L1 | RXD[1] |
| N1 | RXD[2] |
| P1 | RXD[3] |
| P2 | RX_DV |
## How to Buy
you can buy Colorlight i5, i9 and 5A-75B on our aliexpress store
[Colorlight i5 & i9](https://www.aliexpress.com/item/1005001686186007.html?spm=2114.12010615.8148356.1.3e035362vDqWtV)
[Colorlight 5A-75B](https://www.aliexpress.com/item/1005001686175194.html?spm=2114.12010615.8148356.3.3e035362B6o2DO)
## reference
- chubby75
[https://github.com/q3k/chubby75](https://github.com/q3k/chubby75)
- Colorlight-5A-75B
[https://github.com/kholia/Colorlight-5A-75B](https://github.com/kholia/Colorlight-5A-75B)
- colorlight-i5-tips by kazkojima
[https://github.com/kazkojima/colorlight-i5-tips](https://github.com/kazkojima/colorlight-i5-tips)
- ulx3s_examples by lawrie
[https://github.com/lawrie/ulx3s_examples](https://github.com/lawrie/ulx3s_examples)
- ULX3S-Blinky by DoctorWkt
[https://github.com/DoctorWkt/ULX3S-Blinky](https://github.com/DoctorWkt/ULX3S-Blinky.git)
- litex without dram
[https://github.com/wuxx/litexOnColorlightLab004](https://github.com/wuxx/litexOnColorlightLab004)
- litex with dram
[https://github.com/ghent360/riscvOnColorlight-5A-75B](https://github.com/ghent360/riscvOnColorlight-5A-75B)
- litex with ethernet
[https://github.com/enjoy-digital/colorlite](https://github.com/enjoy-digital/colorlite)
- supported in IceStudio and Apio
[https://github.com/benitoss/ColorLight_FPGA_boards](https://github.com/benitoss/ColorLight_FPGA_boards)

View File

@ -0,0 +1,329 @@
# Colorlight-FPGA-Projects
- [Colorlight-FPGA-Projects](#colorlight-fpga-projects)
- [Colorlight i9plus-v6.1](#colorlight-i9plus-v61)
- [Ext-Board](#ext-board)
- [Component](#component)
- [JTAG](#jtag)
- [Clock](#clock)
- [LED](#led)
- [SPI-FLASH (U12)](#spi-flash-u12)
- [DDR2-SODIMM-200P](#ddr2-sodimm-200p)
- [SDRAM (U6)](#sdram-u6)
- [ETH-PHY0 (U5)](#eth-phy0-u5)
- [ETH-PHY1 (U9)](#eth-phy1-u9)
- [How to Build and Program](#how-to-build-and-program)
- [Install the Toolchain](#install-the-toolchain)
- [Compile the Bitstream](#compile-the-bitstream)
- [Build the Openocd](#build-the-openocd)
- [Program](#program)
- [How to Buy](#how-to-buy)
- [reference](#reference)
colorlight i9plus-v6.1
## Colorlight i9plus-v6.1
![top](https://github.com/wuxx/Colorlight-FPGA-Projects/blob/master/doc/i9plus-v6.1-top.jpg)
![bottom](https://github.com/wuxx/Colorlight-FPGA-Projects/blob/master/doc/i9plus-v6.1-bottom.jpg)
## Ext-Board
![ext-board-1](https://github.com/wuxx/Colorlight-FPGA-Projects/blob/master/doc/i9plus-extboard-1.jpg)
![ext-board-2](https://github.com/wuxx/Colorlight-FPGA-Projects/blob/master/doc/i9plus-extboard-2.jpg)
![ext-board-pinout](https://github.com/wuxx/Colorlight-FPGA-Projects/blob/master/doc/i9plus-v6.1-pinout.png)
### Component
- FPGA
XC7A50T-FGG484
- SDRAM
M12L64322A 8MB SDRAM (512K x 32 Bit x 4 Banks)
- SPI Flash
MX25L128 16MB
- Ethernet PHY
1Gb Ethernet PHY Broadcom B50612D x 2
### JTAG
| Pin | Function |
|-----|----------|
| J5 | TCK |
| J4 | TMS |
| J3 | TDI |
| J2 | TDO |
### Clock
A 25Mhz clock is connected to FPGA with pin K4
### LED
| LED | FPGA Pin |
|-----|----------|
| D2 | A18 |
### SPI-FLASH (U12)
| U12 Pin | FPGA Pin |
|-----|----------|
| CS | T19 |
| MISO| R22 |
| MOSI| P22 |
| SCK | L12 |
### DDR2-SODIMM-200P
| Function | Top-Pin | Bot-Pin | Function |
|----------|---------|---------|----------|
| GND | 1 | 2 | 5V |
| GND | 3 | 4 | 5V |
| GND | 5 | 6 | 5V |
| GND | 7 | 8 | 5V |
| GND | 9 | 10 | 5V |
| GND | 11 | 12 | 5V |
| NC | 13 | 14 | NC |
| ETH1_1P| 15 | 16 | ETH2_1P|
| ETH1_1N| 17 | 18 | ETH2_1N|
| NC | 19 | 20 | NC |
| ETH1_2N| 21 | 22 | ETH2_2N|
| ETH1_2P| 23 | 24 | ETH2_2P|
| NC | 25 | 26 | NC |
| ETH1_3P| 27 | 28 | ETH2_3P|
| ETH1_3N| 29 | 30 | ETH2_3N|
| NC | 31 | 32 | NC |
| ETH1_4N| 33 | 34 | ETH2_4N|
| ETH1_4P| 35 | 36 | ETH2_4P|
| NC | 37 | 38 | NC |
| GND | 39 | 40 | GND |
| | | | |
| | | | |
| R2 | 41 | 42 | P5 |
| NC | 43 | 44 | T6 |
| NC | 45 | 46 | U7 |
| NC | 47 | 48 | U6 |
| T3 | 49 | 50 | U5 |
| T4 | 51 | 52 | V5 |
| NC | 53 | 54 | U1 |
| GND | 55 | 56 | GND |
| U2 | 57 | 58 | H3 |
| U3 | 59 | 60 | J1 |
| V2 | 61 | 62 | K1 |
| V3 | 63 | 64 | L1 |
| W1 | 65 | 66 | M1 |
| Y1 | 67 | 68 | J2 |
| AA1 | 69 | 70 | K2 |
| AB1 | 71 | 72 | K3 |
| W2 | 73 | 74 | G3 |
| Y2 | 75 | 76 | J4 |
| AB2 | 77 | 78 | G4 |
| AA3 | 79 | 80 | F4 |
| AB3 | 81 | 82 | L4 |
| Y3 | 83 | 84 | R3 |
| W4 | 85 | 86 | M3 |
| AA4 | 87 | 88 | V4 |
| Y4 | 89 | 90 | R4 |
| AB5 | 91 | 92 | T5 |
| AA5 | 93 | 94 | J5 |
| Y6 | 95 | 96 | J6 |
| AB6 | 97 | 98 | W5 |
| AA6 | 99 | 100 | L5 |
| Y7 | 101 | 102 | L6 |
| AB7 | 103 | 104 | W6 |
| GND | 105 | 106 | GND |
| GND | 107 | 108 | GND |
| AA8 | 109 | 110 | V7 |
| AB8 | 111 | 112 | N13 |
| Y8 | 113 | 114 | N14 |
| W7 | 115 | 116 | P15 |
| Y9 | 117 | 118 | P16 |
| V8 | 119 | 120 | R16 |
| W9 | 121 | 122 | N17 |
| V9 | 123 | 124 | V17 |
| R14 | 125 | 126 | P17 |
| P14 | 127 | 128 | U17 |
| W17 | 129 | 130 | T18 |
| Y18 | 131 | 132 | R17 |
| AA18 | 133 | 134 | U18 |
| W19 | 135 | 136 | R18 |
| AB18 | 137 | 138 | N18 |
| Y19 | 139 | 140 | R19 |
| AA19 | 141 | 142 | N19 |
| V18 | 143 | 144 | N15 |
| V19 | 145 | 146 | M16 |
| AB20 | 147 | 148 | M15 |
| AA20 | 149 | 150 | L15 |
| AA21 | 151 | 152 | L16 |
| AB21 | 153 | 154 | K14 |
| Y21 | 155 | 156 | N22 |
| GND | 157 | 158 | GND |
| NC | 159 | 160 | NC |
| NC | 161 | 162 | NC |
| NC | 163 | 164 | NC |
| NC | 165 | 166 | NC |
| NC | 167 | 168 | NC |
| NC | 169 | 170 | NC |
| NC | 171 | 172 | NC |
| NC | 173 | 174 | NC |
| NC | 175 | 176 | NC |
| NC | 177 | 178 | NC |
| NC | 179 | 180 | NC |
| NC | 181 | 182 | NC |
| NC | 183 | 184 | NC |
| NC | 185 | 186 | NC |
| NC | 187 | 188 | NC |
| NC | 189 | 190 | NC |
| NC | 191 | 192 | NC |
| NC | 193 | 194 | NC |
| NC | 195 | 196 | NC |
| NC | 197 | 198 | NC |
| GND | 199 | 200 | GND |
### SDRAM (U6)
| U6 Pin | FPGA Pin |
|-----|----------|
| CLK | E14 |
| CKE | VCC |
| CS | GND |
| RAS | A14 |
| CAS | D14 |
| WE | D17 |
| DQM0| GND |
| DQM1| GND |
| DQM2| GND |
| DQM3| GND |
| BA0 | D19 |
| BA1 | B13 |
| A0 | C20 |
| A1 | C19 |
| A2 | C13 |
| A3 | F13 |
| A4 | G13 |
| A5 | G15 |
| A6 | F14 |
| A7 | F18 |
| A8 | E13 |
| A9 | E18 |
| A10 | C14 |
| DQ0 | F21 |
| DQ1 | E22 |
| DQ2 | F20 |
| DQ3 | E21 |
| DQ4 | F19 |
| DQ5 | D22 |
| DQ6 | E19 |
| DQ7 | D21 |
| DQ8 | K21 |
| DQ9 | L21 |
| DQ10| K22 |
| DQ11| M21 |
| DQ12| L20 |
| DQ13| M22 |
| DQ14| N20 |
| DQ15| M20 |
| DQ16| B18 |
| DQ17| D20 |
| DQ18| A19 |
| DQ19| A21 |
| DQ20| A20 |
| DQ21| B21 |
| DQ22| C22 |
| DQ23| B22 |
| DQ24| G21 |
| DQ25| G22 |
| DQ26| H20 |
| DQ27| H22 |
| DQ28| J20 |
| DQ29| J22 |
| DQ30| G20 |
| DQ31| J21 |
### ETH-PHY0 (U5)
| U5 Pin | FPGA Pin |
|-------|----------|
| MDC | G1 |
| MDIO | G2 |
| RESET | H2 |
| GTXCLK| A1 |
| TXD[0]| B2 |
| TXD[1]| B1 |
| TXD[2]| C2 |
| TXD[3]| D2 |
| TX_EN | D1 |
| RXC | H2/H4 |
| RXD[0]| E3 |
| RXD[1]| E2 |
| RXD[2]| E1 |
| RXD[3]| F3 |
| RX_DV | F1 |
### ETH-PHY1 (U9)
| U9 Pin | FPGA Pin |
|-------|----------|
| MDC | G1 |
| MDIO | G2 |
| RESET | H2 |
| GTXCLK| M6 |
| TXD[0]| M5 |
| TXD[1]| M2 |
| TXD[2]| N4 |
| TXD[3]| P4 |
| TX_EN | N5 |
| RXC | L3/H2 |
| RXD[0]| N2 |
| RXD[1]| N3 |
| RXD[2]| P1 |
| RXD[3]| P2 |
| RX_DV | R1 |
## How to Build and Program
use the [openXC7 project](https://github.com/openXC7) for compile, and the openocd for program the bitstream.
### Install the Toolchain
openXC7 provides a convenient script to install the toolchain with just one command
```
$wget -qO - https://raw.githubusercontent.com/kintex-chatter/toolchain-installer/main/toolchain-installer.sh | bash
```
### Compile the Bitstream
```
$git clone https://github.com/wuxx/demo-projects
$cd demo-projects/blinky-colorlight-i9plus
$make
```
### Build the Openocd
WCH release the openocd patch of the CH347, they also provide a GUI tool for program the XC7 series chip, can check it [here](https://github.com/WCHSoftGroup/ch347)
```
$git clone https://github.com/openocd-org/openocd.git
$cd openocd
$git checkout 3a4f445bd92101d3daee3715178d3fbff3b7b029
$cp ~/Colorlight-FPGA-Projects/tools/openocd-patch-for-ch347/ch347.patch .
$git apply --reject --whitespace=fix ch347.patch
$./bootstrap
$./configure --enable-ch347 --disable-werror
$make -j
#make install #considering that there may be multiple openocds in your system, it is not recommended to execute the make install
```
### Program
use the openocd to program the bitstream, there are two wrapped script commands `ch347prog-sram` and `ch347prog-flash` in the tools directory, you can import scripts into the environment for use under any path.
NOTE-1: you may need to edit the openocd path(OPENOCD_ROOT) in script.
NOTE-2: Since the flash chip on the module is protected by default, you need to perform the unlock operation when using the module for the first time.
```
$cd ~/Colorlight-FPGA-Projects/tools
$source env.sh
$ch347prog-sram unlock_flash_xc7a50t.bit #unlock the flash
$cd ~/demo-projects/blinky-colorlight-i9plus
$ch347prog-sram blinky.bit (program to SRAM)
or
$ch347prog-flash blinky.bit (program to SPI-Flash)
```
## How to Buy
you can buy Colorlight i5, i9, i9plus and 5A-75B on our aliexpress store
[Colorlight i9plus ](https://www.aliexpress.us/item/3256805434471000.html?spm=5261.ProductManageOnline.0.0.189c2ddbB6XS5T&gatewayAdapt=glo2usa4itemAdapt)
[Colorlight i5 & i9](https://www.aliexpress.com/item/1005001686186007.html?spm=2114.12010615.8148356.1.3e035362vDqWtV)
[Colorlight 5A-75B](https://www.aliexpress.com/item/1005001686175194.html?spm=2114.12010615.8148356.3.3e035362B6o2DO)
## reference
- colorlight_reverse
[https://github.com/chmousset/colorlight_reverse](https://github.com/chmousset/colorlight_reverse)
- openXC7 project
[https://github.com/openXC7/demo-projects](https://github.com/openXC7/demo-projects)
- CH347
[https://github.com/WCHSoftGroup/ch347](https://github.com/WCHSoftGroup/ch347)
- bscan_spi_bitstreams
[https://github.com/quartiq/bscan_spi_bitstreams](https://github.com/quartiq/bscan_spi_bitstreams)

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

View File

@ -0,0 +1,8 @@
## litex_no_dram
`$picocom -b 115200 /dev/ttyACM0`
`$dapprog litex_no_dram.bit`
## litex_with_dram
`$picocom -b 38400 /dev/ttyACM0`
`$dapprog litex_with_dram.bit`

Binary file not shown.

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

Binary file not shown.

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

Binary file not shown.

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

Binary file not shown.

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

Binary file not shown.

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

Binary file not shown.

Binary file not shown.

Binary file not shown.

Binary file not shown.

Binary file not shown.

Binary file not shown.

Binary file not shown.

After

Width:  |  Height:  |  Size: 302 KiB

Binary file not shown.

After

Width:  |  Height:  |  Size: 314 KiB

Binary file not shown.

After

Width:  |  Height:  |  Size: 102 KiB

Binary file not shown.

After

Width:  |  Height:  |  Size: 1.3 MiB

Binary file not shown.

After

Width:  |  Height:  |  Size: 1.4 MiB

Binary file not shown.

After

Width:  |  Height:  |  Size: 5.6 MiB

Binary file not shown.

After

Width:  |  Height:  |  Size: 5.9 MiB

Binary file not shown.

After

Width:  |  Height:  |  Size: 5.8 MiB

Binary file not shown.

After

Width:  |  Height:  |  Size: 5.6 MiB

Binary file not shown.

After

Width:  |  Height:  |  Size: 218 KiB

Binary file not shown.

After

Width:  |  Height:  |  Size: 370 KiB

Binary file not shown.

After

Width:  |  Height:  |  Size: 828 KiB

Binary file not shown.

After

Width:  |  Height:  |  Size: 939 KiB

Binary file not shown.

After

Width:  |  Height:  |  Size: 756 KiB

Binary file not shown.

After

Width:  |  Height:  |  Size: 186 KiB

Binary file not shown.

After

Width:  |  Height:  |  Size: 2.3 MiB

Binary file not shown.

After

Width:  |  Height:  |  Size: 2.0 MiB

Binary file not shown.

After

Width:  |  Height:  |  Size: 2.0 MiB

Binary file not shown.

After

Width:  |  Height:  |  Size: 206 KiB

Binary file not shown.

After

Width:  |  Height:  |  Size: 1.8 MiB

Binary file not shown.

After

Width:  |  Height:  |  Size: 2.1 MiB

Binary file not shown.

After

Width:  |  Height:  |  Size: 2.3 MiB

Binary file not shown.

After

Width:  |  Height:  |  Size: 412 KiB

View File

@ -0,0 +1,55 @@
#!/bin/bash
trap 'onCtrlC' INT
function onCtrlC () {
echo 'exit'
exit 0
}
succ_count=0
fail_count=0
#target_image=/home/pi/oss/colorlight/Colorlight-FPGA-Projects/demo/i9/blink.svf
#target_image=/home/pi/oss/Colorlight-FPGA-Projects/demo/i5/blink.bit
target_image=/home/pi/oss/Colorlight-FPGA-Projects/demo/i5/colorlight_i5.svf
while [ 1 ]; do
./probe.sh
if [ $? -eq 0 ]; then
./unlock.sh
dapprog ${target_image}
#ecpdap flash write --freq 5000 ${target_image}
if [ $? -eq 0 ]; then
succ_count=$(($succ_count+1))
buzzer_succ
echo -e "\033[32m---------- SUCC [$succ_count] ----------\033[0m"
else
fail_count=$(($fail_count+1))
buzzer_fail
echo -e "\033[31m---------- FAIL [$fail_count] ----------\033[0m"
fi
while [ 1 ]; do
./probe.sh
if [ $? -eq 1 ]; then
break;
else
echo "wait detach >>> [$(lsusb | grep "0d28:0204")]"
sleep 0.1
fi
done
else
echo "wait attach <<< [$(lsusb | grep "0d28:0204")]"
sleep 0.1
fi
done

View File

@ -0,0 +1,14 @@
#!/bin/bash
while [ 1 ]; do
if [ -e /dev/ttyACM0 ]; then
picocom -b 115200 /dev/ttyACM0
else
echo "wait ttyACM0..."
sleep 0.5
fi
done

View File

@ -0,0 +1,3 @@
#!/bin/bash
dapprog -p >/dev/null 2>&1

View File

@ -0,0 +1,3 @@
#!/bin/bash
ecpdap flash unprotect

View File

@ -0,0 +1,50 @@
#!/bin/bash
trap 'onCtrlC' INT
function onCtrlC () {
echo 'exit'
exit 0
}
succ_count=0
fail_count=0
target_image=/home/pi/oss/colorlight/Colorlight-FPGA-Projects/demo/i9/blink.svf
while [ 1 ]; do
./probe.sh
if [ $? -eq 0 ]; then
./unlock.sh
dapprog ${target_image}
if [ $? -eq 0 ]; then
succ_count=$(($succ_count+1))
echo -e "\033[32m---------- SUCC [$succ_count] ----------\033[0m"
else
fail_count=$(($fail_count+1))
echo -e "\033[31m---------- FAIL [$fail_count] ----------\033[0m"
fi
while [ 1 ]; do
./probe.sh
if [ $? -eq 1 ]; then
break;
else
echo "wait detach >>> [$(lsusb | grep "0d28:0204")]"
sleep 0.1
fi
done
else
echo "wait attach <<< [$(lsusb | grep "0d28:0204")]"
sleep 0.1
fi
done

View File

@ -0,0 +1,14 @@
#!/bin/bash
while [ 1 ]; do
if [ -e /dev/ttyACM0 ]; then
picocom -b 115200 /dev/ttyACM0
else
echo "wait ttyACM0..."
sleep 0.5
fi
done

View File

@ -0,0 +1,3 @@
#!/bin/bash
dapprog -p >/dev/null 2>&1

View File

@ -0,0 +1,3 @@
#!/bin/bash
ecpdap flash unprotect

View File

@ -0,0 +1,24 @@
# Colorlight i5 & i9 Get Start
The breakout board has a ARMMbed DAPLink debugger which support JTAG and a CDC serial port, we need to use openocd to program the bitstream.
assume that you have install the yosys & prjtrellis & nextpnr, if no, please check these links.
- [https://github.com/cliffordwolf/yosys](https://github.com/cliffordwolf/yosys)
- [https://github.com/YosysHQ/prjtrellis](https://github.com/YosysHQ/prjtrellis)
- [https://github.com/YosysHQ/nextpnr](https://github.com/YosysHQ/nextpnr)
## openocd
`$git clone https://github.com/ntfreak/openocd.git`
`$cd openocd`
`$git submodule init`
`$git submodule update`
`$./bootstrap`
`$./configure --enable-cmsis-dap`
`$make -j`
`$sudo make install`
## setup
after openocd installed, a shell script `dapprog` is written for convenient, export the path of dapprog, then we can use it everywhere, because the openocd can only support svf file, so the bit file is first convert to svf file with a little modified urjtag, then use openocd command svf to process it. in addition, the svf file is program to sram and the bit file is program to the flash.
`$cd Colorlight-FPGA-Projects/tools`
`$source env.sh`
`$dapprog xxx.svf or xxx.bit`
the SPI-Flash on i5 modules is GD25Q16, program bitstream to the SPI-Flash is failed in current, it seems the Flash is locked, the simpest way to solve this ~~may be replace the chip with a Winbond w25Qxx like W25Q128~~ is follow [this instruction](https://github.com/kazkojima/colorlight-i5-tips#spiflash)

View File

@ -0,0 +1,27 @@
TARGET=blink
TOP=blink
OBJS+=blink.v rst_gen.v
TRELLIS=/usr/local/share/trellis
all: ${TARGET}.bit
$(TARGET).json: $(OBJS)
yosys -p "synth_ecp5 -json $@" $(OBJS)
$(TARGET)_out.config: $(TARGET).json
nextpnr-ecp5 --25k --package CABGA256 --speed 6 --json $< --textcfg $@ --lpf $(TARGET).lpf --freq 65
$(TARGET).bit: $(TARGET)_out.config
ecppack --svf ${TARGET}.svf $< $@
${TARGET}.svf : ${TARGET}.bit
prog: ${TARGET}.svf
openFPGALoader -c digilent_hs2 $(TARGET).bit
clean:
rm -f *.svf *.bit *.config *.ys
.PHONY: prog clean

File diff suppressed because it is too large Load Diff

Some files were not shown because too many files have changed in this diff Show More