colin
/
abstractaccelerator
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Update README.md 

Added reference to version 1.0.
This commit is contained in:
jrahmeh 2019-06-06 11:32:35 -05:00 committed by GitHub
parent 56db557851
commit 166274de5e
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
README.md
View File

@ -1,6 +1,6 @@
# SweRV RISC-V Core<sup>TM</sup> 1.1 from Western Digital
This repository contains the SweRV Core<sup>TM</sup> 1.1 design RTL
This repository contains the SweRV Core<sup>TM</sup> 1.1 design RTL. The previous version can be found in [branch 1.0.](https://github.com/chipsalliance/Cores-SweRV/tree/1.0)
## License