From 2627ccc82be089dc636f40cf6a365a31f2691874 Mon Sep 17 00:00:00 2001 From: Olof Kindgren Date: Tue, 22 Sep 2020 16:27:04 +0200 Subject: [PATCH] Adapt FuseSoC SweRV config generator wrt new snapshot dir --- configs/swerv_config_gen.py | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/configs/swerv_config_gen.py b/configs/swerv_config_gen.py index 6de270e..7199df0 100644 --- a/configs/swerv_config_gen.py +++ b/configs/swerv_config_gen.py @@ -14,14 +14,14 @@ class SwervConfigGenerator(Generator): def run(self): script_root = os.path.abspath(os.path.join(os.path.dirname(sys.argv[0]), '..')) files = [ - {"configs/snapshots/default/common_defines.vh" : { + {"snapshots/default/common_defines.vh" : { "copyto" : "config/common_defines.vh", "file_type" : "systemVerilogSource"}}, - {"configs/snapshots/default/pic_ctrl_verilator_unroll.sv" : { + {"snapshots/default/pic_ctrl_verilator_unroll.sv" : { "copyto" : "config/pic_ctrl_verilator_unroll.sv", "is_include_file" : True, "file_type" : "systemVerilogSource"}}, - {"configs/snapshots/default/pic_map_auto.h" : { + {"snapshots/default/pic_map_auto.h" : { "copyto" : "config/pic_map_auto.h", "is_include_file" : True, "file_type" : "systemVerilogSource"}}]