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Updated release notes.

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Joseph Rahmeh 2020-02-19 18:18:48 -08:00
parent 480c765eb4
commit 36675abd25
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@ -9,7 +9,8 @@ is added to the SweRV core.
1. Bug fixes: 1. Bug fixes:
* Hart incorrectly cleared dmcontrol.dmactive on reset (reported by * Hart incorrectly cleared dmcontrol.dmactive on reset (reported by
Codasip). Codasip). Note that a separate system power-on-reset signal `dbg_rst_l`
was added to differentiate power-on-reset vs core reset.
* Hart never asserted the dmstatus.allrunning signal on reset which * Hart never asserted the dmstatus.allrunning signal on reset which
caused a timeout in OpenOCD (reported by Codasip). caused a timeout in OpenOCD (reported by Codasip).
* Debug module failed to auto-increment register on system-bus access * Debug module failed to auto-increment register on system-bus access