Add fpga

fpga/.gitignore

@@ -0,0 +1,5 @@
+nextpnr
+prjtrellis
+yosys
+riscv-openocd
+hidapi

fpga/Readme.md

@@ -0,0 +1,66 @@
+# fpga demo from all open resource
+
+## install depends
+
+```bash
+sudo apt-get install build-essential clang bison flex libreadline-dev gawk tcl-dev libffi-dev git graphviz xdot pkg-config python3 libboost-system-dev libboost-python-dev libboost-filesystem-dev zlib1g-dev build-essential libboost-system-dev libboost-thread-dev libboost-program-options-dev libboost-test-dev libboost-iostreams-dev python3.9-dev libboost-iostreams-dev libeigen3-dev libudev-dev cmake python3-pip gcc gdb autoconf automake libtool libusb-dev libusb-1.0-0-dev python2.7-dev
+```
+
+## install yosys
+
+```
+git clone https://github.com/YosysHQ/yosys
+make config-gcc
+make -j
+sudo make install
+```
+
+## install Trellis for ECP5 devices support
+
+```
+git clone --recursive https://github.com/YosysHQ/prjtrellis \
+&& cd prjtrellis && cd libtrellis \
+&& cmake -DCMAKE_INSTALL_PREFIX=/usr/local . && make -j \
+&& sudo make install \
+&& cd ../../
+```
+
+## install nextpnr
+
+```
+git clone https://github.com/YosysHQ/nextpnr.git \
+&& cd nextpnr \
+&& cmake . -DARCH=ecp5 -DTRELLIS_INSTALL_PREFIX=/usr/local \
+&& make -j \
+&& sudo make install \
+&& cd ..
+```
+
+## build openocd with DAP
+
+```bash
+git clone https://github.com/signal11/hidapi.git \
+&& cd hidapi \
+&& ./bootstrap \
+&& ./configure \
+&& make -j \
+&& sudo make install \
+&& cd ..
+
+git clone https://github.com/riscv/riscv-openocd.git \
+&& cd riscv-openocd \
+&& ./bootstrap \
+&& ./configure --prefix=$RISCV --enable-cmsis-dap --enable-remote-bitbang --enable-jtag_vpi --enable-ftdi --enable-jlink \
+&& make \
+&& sudo make install \
+&& cd ..
+```
+
+## test with office demo
+
+At /home/colin/develop/Colorlight-FPGA-Projects/demo/i5 
+
+```bash
+./../../tools/dapprog blink.svf
+```
+

fpga/blink/.gitignore

@@ -0,0 +1,5 @@
+*.svf 
+*.bit 
+*.cfg 
+*.ys 
+*.json

fpga/blink/Makefile

@@ -0,0 +1,25 @@
+TARGET=blink
+
+OBJS+=blink.v
+
+all: ${TARGET}.bit
+
+$(TARGET).json: $(OBJS)
+	yosys -p "read_verilog $(OBJS); synth_ecp5 -top ${TARGET} -json $@"
+
+$(TARGET).cfg: $(TARGET).json
+	nextpnr-ecp5 --25k --package CABGA381 --speed 6 --json $< --textcfg $@ --lpf $(TARGET).lpf --freq 65
+
+$(TARGET).bit: $(TARGET).cfg
+	ecppack --svf ${TARGET}.svf $< $@
+
+${TARGET}.svf : ${TARGET}.bit
+
+prog: ${TARGET}.svf
+	# openFPGALoader -c digilent_hs2 $(TARGET).bit
+	./dapprog ${TARGET}.svf 
+
+clean:
+	rm -f *.svf *.bit *.config *.ys *.json
+
+.PHONY: prog clean

fpga/blink/blink.lpf

@@ -0,0 +1,8 @@
+LOCATE COMP "clk_i" SITE "P3";
+IOBUF PORT "clk_i" IO_TYPE=LVCMOS33;
+FREQUENCY PORT "clk_i" 25 MHZ;
+
+LOCATE COMP "led_o" SITE "U16";
+
+IOBUF PORT "led_o" IO_TYPE=LVCMOS25;
+

fpga/blink/blink.v

@@ -0,0 +1,51 @@
+module rst_gen (
+	input 			clk_i,
+	input 			rst_i,
+	output			rst_o
+);
+
+/* try to generate a reset */
+reg [2:0]	rst_cpt;
+always @(posedge clk_i) begin
+	if (rst_i)
+		rst_cpt = 3'b0;
+	else begin
+		if (rst_cpt == 3'b100)
+			rst_cpt = rst_cpt;
+		else
+			rst_cpt = rst_cpt + 3'b1;
+	end
+end
+
+assign rst_o = !rst_cpt[2];
+
+endmodule
+
+module blink (
+    input      clk_i,
+    output reg led_o
+);
+localparam MAX = 2_500_000_0;
+localparam WIDTH = $clog2(MAX);
+
+wire rst_s;
+wire clk_s;
+
+assign clk_s = clk_i;
+//pll_12_16 pll_inst (.clki(clk_i), .clko(clk_s), .rst(rst_s));
+rst_gen rst_inst (.clk_i(clk_s), .rst_i(1'b0), .rst_o(rst_s));
+
+reg  [WIDTH-1:0] cpt_s;
+wire [WIDTH-1:0] cpt_next_s = cpt_s + 1'b1;
+
+wire             end_s = cpt_s == MAX-1;
+
+always @(posedge clk_s) begin
+    cpt_s <= (rst_s || end_s) ? {WIDTH{1'b0}} : cpt_next_s;
+
+    if (rst_s)
+        led_o <= 1'b0;
+    else if (end_s)
+        led_o <= ~led_o;
+end
+endmodule

fpga/blink/dapprog

@@ -0,0 +1,54 @@
+#!/bin/bash
+
+if [ ${#1} -eq 0 ]; then
+    echo "usage: dapprog xxx.bit or xxx.svf"
+    exit 0
+fi
+
+CURRENT_DIR=$(cd $(dirname $0); pwd)
+CONFIG=${CURRENT_DIR}/cmsisdap.cfg
+
+if [ "$1" == "--probe" ] || [ "$1" == "-p" ]; then
+    #probe add -d4 for detail log
+    sudo openocd -f ${CONFIG} -c \
+    "   init;
+        scan_chain;
+        exit;
+    "
+    exit $?
+
+else
+    # program 
+    IMAGE_FILE=$1
+    
+    EXT="${IMAGE_FILE##*.}"
+    echo EXT: $EXT
+    
+    #flash write_image erase xxx.hex;
+    #flash write_image erase xxx.bin 0x08000000;
+    
+    if [ "${EXT}" == "svf" ]; then
+        TARGET="$IMAGE_FILE"
+    elif [ "${EXT}" == "bit" ]; then
+        NAME="${IMAGE_FILE%%.bit}"
+        #/home/pi/oss/ulx3s/tools/ujprog/ujprog -j SRAM  ${IMAGE_FILE} > ${NAME}_sram.svf
+        ${CURRENT_DIR}/ujprog.bit2svf -j FLASH ${IMAGE_FILE} > ${NAME}_flash.svf
+        TARGET="${NAME}_flash.svf"
+    else
+        echo "illegal suffix [$EXT]"
+        exit 1
+    fi
+    
+    echo "TARGET: ${TARGET}"
+    
+    sudo openocd -f ${CONFIG} -c \
+    "   init;
+        scan_chain;
+        svf -tap ecp5.tap -quiet -progress ${TARGET};
+        exit;
+    "
+    
+    exit $?
+
+fi
+