From 5fb3787307ae21e832de7cd9707b381d4af4ea35 Mon Sep 17 00:00:00 2001
From: "colin.liang" <colin.liang@enflame-tech.com>
Date: Fri, 6 Jan 2023 21:19:54 +0800
Subject: [PATCH] reset from top.v.

---
 uriscv/demo/Makefile | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/uriscv/demo/Makefile b/uriscv/demo/Makefile
index 2ca6fe8..f0ae890 100644
--- a/uriscv/demo/Makefile
+++ b/uriscv/demo/Makefile
@@ -36,11 +36,11 @@ top.v:
 	./ivlpp -F include.f -f soc.mk -o top.v
 
 verilator-build: top.v
-# verilator-build:
 	verilator --cc -CFLAGS ${CFLAGS} \
 								-Wno-WIDTH \
 	              -Wno-UNOPTFLAT \
-	              top.v \
+								-I../src \
+	              -F ./soc.mk \
 	              --top-module soc_sim -exe test_soc_sim.cpp --autoflush $(VERILATOR_DEBUG)
 	cp ${DEMODIR}/test_soc_sim.cpp obj_dir
 	$(MAKE) -j -e -C obj_dir/ -f Vsoc_sim.mk $(VERILATOR_MAKE_FLAGS)