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Update led.v

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Colin 2025-04-19 17:36:26 +08:00
parent 5f9a2b7922
commit 6485650509
1 changed files with 1 additions and 1 deletions
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fpga/xc7z010/led.v
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@ -28,7 +28,7 @@ end
// 100的时候，占空比最大，这个时候直接完全输出低电平，led等熄灭 // 100的时候，占空比最大，这个时候直接完全输出低电平，led等熄灭
always@(posedge myclk) begin always@(posedge myclk) begin
if(flag == 0) begin // 占空比递增 if(flag == 0) begin // 占空比递增
if(current_cycle < (CYCLE_NUMBER/2)) if(current_cycle < (CYCLE_NUMBER/10))
current_cycle <= current_cycle + 1'b1; current_cycle <= current_cycle + 1'b1;
else else
flag <= ~flag; flag <= ~flag;