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reverting to 0242c9e for swerv_config_gen.py

This commit is contained in:
Ajay Nath 2021-03-12 08:02:57 -05:00
parent d4e7b25f71
commit 81bff1c0d7
1 changed files with 14 additions and 6 deletions
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20
configs/swerv_config_gen.py
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@ -1,34 +1,42 @@
#!/usr/bin/env python
#!/usr/bin/env python3
from fusesoc.capi2.generator import Generator
import os
import shutil
import subprocess
import sys
import tempfile
if sys.version[0] == '2':
devnull = open(os.devnull, 'w')
else:
from subprocess import DEVNULL as devnull
class SwervConfigGenerator(Generator):
def run(self):
build_path="swerv_config"
script_root = os.path.abspath(os.path.join(os.path.dirname(sys.argv[0]), '..'))
files = [
{"configs/snapshots/default/common_defines.vh" : {
{os.path.join(build_path, "common_defines.vh") : {
"copyto" : "config/common_defines.vh",
"file_type" : "systemVerilogSource"}},
{"configs/snapshots/default/pic_ctrl_verilator_unroll.sv" : {
{os.path.join(build_path, "pic_ctrl_verilator_unroll.sv") : {
"copyto" : "config/pic_ctrl_verilator_unroll.sv",
"is_include_file" : True,
"file_type" : "systemVerilogSource"}},
{"configs/snapshots/default/pic_map_auto.h" : {
{os.path.join(build_path, "pic_map_auto.h") : {
"copyto" : "config/pic_map_auto.h",
"is_include_file" : True,
"file_type" : "systemVerilogSource"}}]
tmp_dir = os.path.join(tempfile.mkdtemp(), 'core')
shutil.copytree(self.files_root, tmp_dir)
shutil.copytree(script_root, tmp_dir)
cwd = tmp_dir
env = os.environ.copy()
env['RV_ROOT'] = tmp_dir
env['BUILD_PATH'] = build_path
args = ['configs/swerv.config'] + self.config.get('args', [])
rc = subprocess.call(args, cwd=cwd, env=env)
rc = subprocess.call(args, cwd=cwd, env=env, stdout=devnull)
if rc:
exit(1)