3 Commits

Author	SHA1	Message	Date
colin	1f222dd1e3	Split soc and verilator to two part system verilog.	2022-02-14 12:32:21 +00:00
colin	547f0dbdc3	remove axi4 in demo soc use ahb as default	2022-02-10 12:17:10 +00:00
colin	853d12f17c	Init to abstract accelerator project	2022-02-02 03:34:37 +00:00