export CODE_BASE_PATH = ${PWD}/../../E906_RTL_FACTORY
GDB_PREFIX = /opt/riscv/bin/riscv32-unknown-elf-gdb

FILELIST = -F ./dpi/jtag.fl ../Murax.v

DEMODIR = ${PWD}

TEST = sim

# CFLAGS for verilator generated Makefiles. Without -std=c++11 it complains for `auto` variables
CFLAGS += "-std=c++11"
# Optimization for better performance; alternative is nothing for slower runtime (faster compiles)
# -O2 for faster runtime (slower compiles), or -O for balance.
VERILATOR_MAKE_FLAGS = OPT_FAST="-Os"

# Targets
all: clean verilator

clean:
	rm -rf obj_dir

##################### Verilog Builds #####################################

verilator-build:
	verilator --cc -CFLAGS ${CFLAGS} \
	              -Wno-UNOPTFLAT \
	              -Wno-STMTDLY \
	              -Wno-MULTIDRIVEN \
	              -Wno-CASEINCOMPLETE \
	              -Wno-COMBDLY \
	              -Wno-LATCH \
	              -Wno-WIDTH \
	              -Wno-IMPLICIT \
	              ${FILELIST} \
								soc_sim.v \
								--trace \
	              --top-module soc_sim -exe test_soc_sim.cpp --autoflush
	cp ${DEMODIR}/test_soc_sim.cpp obj_dir
	$(MAKE) -j -C obj_dir/ -f Vsoc_sim.mk $(VERILATOR_MAKE_FLAGS)

##################### Simulation Runs #####################################

verilator: verilator-build
	./obj_dir/Vsoc_sim 

##################### openocd #####################################

openocd:
	openocd -c "set MURAX_CPU0_YAML cpu0.yaml" -f murax.cfg 
# openocd -f riscv.cfg
# openocd -f riscv.cfg -d3

gdb:
	$(GDB_PREFIX) -x gdbinit ./hello_world.elf

help:
	@echo Possible targets: verilator help clean all verilator-build program.hex

.PHONY: help clean verilator