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Verilog 56.8%
SystemVerilog 30.2%
Perl 5.4%
C 5.1%
Assembly 1.1%
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colin 3405c88c9e Correct blink and use sample blink code 2022-02-07 13:23:34 +00:00
Cores-SweRV Add verilator install method in readme. 2022-02-07 08:13:16 +00:00
fpga Correct blink and use sample blink code 2022-02-07 13:23:34 +00:00
jtag add jtag to ESP32 2022-02-02 03:40:41 +00:00