abstractaccelerator/fpga/xc7z010/design_1/ui/bd_51b9e37f.ui

24 lines
1013 B
XML

{
"ActiveEmotionalView":"Default View",
"Default View_ScaleFactor":"1.5",
"Default View_TopLeft":"-831,-353",
"ExpandedHierarchyInLayout":"",
"guistr":"# # String gsaved with Nlview 7.0r6 2020-01-29 bk=1.5227 VDI=41 GEI=36 GUI=JA:10.0 non-TLS
# -string -flagsOSRD
preplace port M_AXI -pg 1 -lvl 2 -x 240 -y 70 -defaultsOSRD
preplace port S_AXI -pg 1 -lvl 0 -x 0 -y 50 -defaultsOSRD
preplace port port-id_M_ACLK -pg 1 -lvl 0 -x 0 -y 70 -defaultsOSRD
preplace port port-id_M_ARESETN -pg 1 -lvl 0 -x 0 -y 90 -defaultsOSRD
preplace port port-id_S_ACLK -pg 1 -lvl 0 -x 0 -y 20 -defaultsOSRD
preplace port port-id_S_ARESETN -pg 1 -lvl 0 -x 0 -y 110 -defaultsOSRD
preplace inst s01_data_fifo -pg 1 -lvl 1 -x 120 -y 70 -defaultsOSRD
preplace netloc M_ACLK_1 1 0 1 NJ 70
preplace netloc M_ARESETN_1 1 0 1 NJ 90
preplace netloc s01_couplers_to_s01_data_fifo 1 0 1 NJ 50
preplace netloc s01_data_fifo_to_s01_couplers 1 1 1 N 70
levelinfo -pg 1 0 120 240
pagesize -pg 1 -db -bbox -sgen -140 -10 340 150
"
}