colin
/
abstractaccelerator
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity
abstractaccelerator/VexRiscv/sim
History
colin 2c4658ddb9 Refine murax sim config file 2022-02-28 03:33:41 +00:00
..
.gitignore Add VexRiscv. 2022-02-25 11:56:36 +00:00
Makefile Enable VexRiscv murax jtag simulator by verilator. 2022-02-26 14:34:25 +00:00
Readmd.md Enable VexRiscv murax jtag simulator by verilator. 2022-02-26 14:34:25 +00:00
cpu0.yaml Add VexRiscv. 2022-02-25 11:56:36 +00:00
gdbinit Enable VexRiscv murax jtag simulator by verilator. 2022-02-26 14:34:25 +00:00
hello_world.elf Enable VexRiscv murax jtag simulator by verilator. 2022-02-26 14:34:25 +00:00
jtag_tcp.cfg Enable VexRiscv murax jtag simulator by verilator. 2022-02-26 14:34:25 +00:00
main.cpp Enable VexRiscv murax jtag simulator by verilator. 2022-02-26 14:34:25 +00:00
murax.cfg Refine murax sim config file 2022-02-28 03:33:41 +00:00