abstractaccelerator/fpga/verilator/Makefile

14 lines
220 B
Makefile

TARGET=top
OBJS+=top.v
clean:
rm -rf *.svf *.bit *.config *.ys *.json obj_dir logs
verilator:
rm -rf obj_dir
verilator -Wall --cc --exe --build --trace sim_main.cpp $(OBJS)
obj_dir/Vtop +trace
.PHONY: prog clean