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abstractaccelerator
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145 Commits 1 Branch 0 Tags 68 MiB
Verilog 56.8%
SystemVerilog 30.2%
Perl 5.4%
C 5.1%
Assembly 1.1%
Other 1.3%
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colin a6038fde4a Set DCCM and ICCM size to 32KB 2022-02-11 12:17:21 +00:00
.vscode Set DCCM and ICCM size to 32KB 2022-02-11 12:17:21 +00:00
Cores-SweRV Set DCCM and ICCM size to 32KB 2022-02-11 12:17:21 +00:00
fpga Add ram test and verilator in fpga DEMO. 2022-02-09 12:47:35 +00:00
jtag add jtag to ESP32 2022-02-02 03:40:41 +00:00