95 lines
2.3 KiB
Systemverilog
95 lines
2.3 KiB
Systemverilog
//********************************************************************************
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// SPDX-License-Identifier: Apache-2.0
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// Copyright 2020 Western Digital Corporation or its affiliates.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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//********************************************************************************
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module el2_ifu_tb_memread;
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logic [15:0] compressed [0:128000]; // vector of compressed instructions
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logic [31:0] expected [0:128000]; // vector of correspoding expected instruction
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logic rst_l;
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logic clk;
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int clk_count;
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logic [31:0] expected_val;
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logic [15:0] compressed_din;
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logic [31:0] actual;
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logic error;
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integer i;
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initial begin
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clk = 0;
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rst_l = 0;
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// initialize the reads and populate the instruction arrays
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$readmemh("left64k", compressed);
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$readmemh("right64k", expected);
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$dumpfile("top.vcd");
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$dumpvars;
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$dumpon;
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end
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always #50 clk = ~clk;
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always @(posedge clk) begin
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clk_count = clk_count + 1;
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if (clk_count >= 1 & clk_count <= 3) rst_l <= 1'b0;
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else rst_l <= 1'b1;
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if (clk_count > 3) begin
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compressed_din[15:0] <= compressed[clk_count-3]; // c.mv
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expected_val[31:0] <= expected[clk_count-3];
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end
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if (clk_count == 65000) begin
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$dumpoff;
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$finish;
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end
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end // always @ (posedge clk)
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always @(negedge clk) begin
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if (clk_count > 3 & error) begin
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$display("clock: %d compressed %h error actual %h expected %h", clk_count, compressed_din,
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actual, expected_val);
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end
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end
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el2_ifu_compress_ctl align (
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.*,
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.din (compressed_din[15:0]),
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.dout(actual[31:0])
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);
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assign error = actual[31:0] != expected_val[31:0];
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endmodule // el2_ifu_tb_memread
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