cores-swerv-el2/tools/Makefile

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# SPDX-License-Identifier: Apache-2.0
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# Copyright 2020 Western Digital Corporation or its affiliates.
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#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
#
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CONF_PARAMS = -set build_axi4
TEST_CFLAGS = -g -O3 -funroll-all-loops
ABI = -mabi=ilp32 -march=rv32imac
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# Check for RV_ROOT
ifeq (,$(wildcard ${RV_ROOT}/configs/swerv.config))
$(error env var RV_ROOT does not point to a valid dir! Exiting!)
endif
# Allow snapshot override
target = default
snapshot = $(target)
# Allow tool override
SWERV_CONFIG = ${RV_ROOT}/configs/swerv.config
IRUN = xrun
VCS = vcs
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VLOG = qverilog
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VERILATOR = verilator
RIVIERA = riviera
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GCC_PREFIX = riscv64-unknown-elf
BUILD_DIR = snapshots/${snapshot}
TBDIR = ${RV_ROOT}/testbench
# Define test name
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TEST = hello_world
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TEST_DIR = ${TBDIR}/asm
HEX_DIR = ${TBDIR}/hex
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# Determine test directory
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ifneq (,$(wildcard $(TBDIR)/tests/$(TEST)))
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TEST_DIR = $(TBDIR)/tests/$(TEST)
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endif
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OFILES = $(TEST).o
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ifdef debug
DEBUG_PLUS = +dumpon
IRUN_DEBUG = -access +rc
IRUN_DEBUG_RUN = -input ${RV_ROOT}/testbench/input.tcl
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VCS_DEBUG = -debug_access
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VERILATOR_DEBUG = --trace
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RIVIERA_DEBUG = +access +r
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endif
# provide specific link file
ifeq (,$(wildcard $(TEST_DIR)/$(TEST).ld))
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LINK = $(BUILD_DIR)/link.ld
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else
LINK = $(TEST_DIR)/$(TEST).ld
endif
VPATH = $(TEST_DIR) $(BUILD_DIR) $(TBDIR)
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-include $(TEST_DIR)/$(TEST).mki
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TBFILES = $(TBDIR)/tb_top.sv $(TBDIR)/ahb_sif.sv
defines = $(BUILD_DIR)/common_defines.vh
defines += ${RV_ROOT}/design/include/el2_def.sv
defines += $(BUILD_DIR)/el2_pdef.vh
includes = -I${BUILD_DIR}
# CFLAGS for verilator generated Makefiles. Without -std=c++11 it
# complains for `auto` variables
CFLAGS += "-std=c++11"
# Optimization for better performance; alternative is nothing for
# slower runtime (faster compiles) -O2 for faster runtime (slower
# compiles), or -O for balance.
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VERILATOR_MAKE_FLAGS = OPT_FAST="-Os"
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# Targets
all: clean verilator
clean:
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rm -rf *.log *.s *.hex *.dis *.tbl irun* vcs* simv* *.map snapshots swerv* \
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verilator* *.exe obj* *.o ucli.key vc_hdrs.h csrc *.csv work\
dataset.asdb library.cfg vsimsa.cfg riviera-build wave.asdb
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############ Model Builds ###############################
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# If define files do not exist, then run swerv.config.
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${BUILD_DIR}/defines.h:
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BUILD_PATH=${BUILD_DIR} ${RV_ROOT}/configs/swerv.config -target=$(target) $(CONF_PARAMS)
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verilator-build: ${TBFILES} ${BUILD_DIR}/defines.h test_tb_top.cpp
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echo '`undef RV_ASSERT_ON' >> ${BUILD_DIR}/common_defines.vh
$(VERILATOR) --cc -CFLAGS ${CFLAGS} $(defines) \
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$(includes) -I${RV_ROOT}/testbench -f ${RV_ROOT}/testbench/flist \
-Wno-WIDTH -Wno-UNOPTFLAT ${TBFILES} --top-module tb_top \
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-exe test_tb_top.cpp --autoflush $(VERILATOR_DEBUG)
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cp ${RV_ROOT}/testbench/test_tb_top.cpp obj_dir/
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$(MAKE) -j -e -C obj_dir/ -f Vtb_top.mk $(VERILATOR_MAKE_FLAGS)
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touch verilator-build
vcs-build: ${TBFILES} ${BUILD_DIR}/defines.h
$(VCS) -full64 -assert svaext -sverilog +define+RV_OPENSOURCE \
+error+500 +incdir+${RV_ROOT}/design/lib \
+incdir+${RV_ROOT}/design/include ${BUILD_DIR}/common_defines.vh \
+incdir+$(BUILD_DIR) +libext+.v $(defines) \
-f ${RV_ROOT}/testbench/flist ${TBFILES} -l vcs.log
touch vcs-build
irun-build: ${TBFILES} ${BUILD_DIR}/defines.h
$(IRUN) -64bit -elaborate $(IRUN_DEBUG) -q -sv -sysv -nowarn CUVIHR \
-xmlibdirpath . -xmlibdirname swerv.build \
-incdir ${RV_ROOT}/design/lib -incdir ${RV_ROOT}/design/include \
-vlog_ext +.vh+.h $(defines) -incdir $(BUILD_DIR) \
-f ${RV_ROOT}/testbench/flist -top tb_top ${TBFILES} \
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-I${RV_ROOT}/testbench -elaborate -snapshot ${snapshot} $(profile)
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touch irun-build
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riviera-build: ${TBFILES} ${BUILD_DIR}/defines.h
vlib work
vlog -work work \
+incdir+${RV_ROOT}/design/lib \
+incdir+${RV_ROOT}/design/include \
+incdir+${BUILD_DIR} \
-y ${RV_ROOT}/design/lib +libext+.v+.vh \
$(defines) \
-f ${RV_ROOT}/testbench/flist \
${TBFILES}
touch riviera-build
############ TEST Simulation ###############################
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verilator: program.hex verilator-build
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./obj_dir/Vtb_top
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irun: program.hex irun-build
$(IRUN) -64bit -abvglobalfailurelimit 1 +lic_queue -licqueue \
-status -xmlibdirpath . -xmlibdirname swerv.build \
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-snapshot ${snapshot} -r $(snapshot) $(IRUN_DEBUG_RUN) $(profile)
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vcs: program.hex vcs-build
./simv $(DEBUG_PLUS) +vcs+lic+wait -l vcs.log
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vlog: program.hex ${TBFILES} ${BUILD_DIR}/defines.h
$(VLOG) -l vlog.log -sv -mfcu +incdir+${BUILD_DIR}+${RV_ROOT}/design/include+${RV_ROOT}/design/lib\
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$(defines) -f ${RV_ROOT}/testbench/flist ${TBFILES} -R +nowarn3829 +nowarn2583 ${DEBUG_PLUS}
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riviera: program.hex riviera-build
vsim -c -lib work ${DEBUG_PLUS} ${RIVIERA_DEBUG} tb_top -do "run -all; exit" -l riviera.log
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############ TEST build ###############################
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ifeq ($(shell which $(GCC_PREFIX)-gcc 2> /dev/null),)
program.hex: ${BUILD_DIR}/defines.h
@echo " !!! No $(GCC_PREFIX)-gcc in path, using canned hex files !!"
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cp ${HEX_DIR}/$(TEST).hex program.hex
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else
ifneq (,$(wildcard $(TEST_DIR)/$(TEST).makefile))
program.hex:
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@echo Building $(TEST) via $(TEST_DIR)/$(TEST).makefile
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$(MAKE) -f $(TEST_DIR)/$(TEST).makefile
else
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program.hex: $(OFILES) $(LINK)
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@echo Building $(TEST)
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$(GCC_PREFIX)-gcc $(ABI) -Wl,-Map=$(TEST).map -lgcc -T$(LINK) -o $(TEST).exe $(OFILES) -nostartfiles $(TEST_LIBS)
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$(GCC_PREFIX)-objcopy -O verilog $(TEST).exe program.hex
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$(GCC_PREFIX)-objdump -S $(TEST).exe > $(TEST).dis
@echo Completed building $(TEST)
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%.o : %.s ${BUILD_DIR}/defines.h
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$(GCC_PREFIX)-cpp -I${BUILD_DIR} $< > $*.cpp.s
$(GCC_PREFIX)-as ${ABI} $*.cpp.s -o $@
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%.o : %.c ${BUILD_DIR}/defines.h
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$(GCC_PREFIX)-gcc ${includes} ${TEST_CFLAGS} -DCOMPILER_FLAGS="\"${TEST_CFLAGS}\"" ${ABI} -nostdlib -c $< -o $@
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endif
endif
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help:
@echo Make sure the environment variable RV_ROOT is set.
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@echo Possible targets: verilator vcs irun vlog riviera help clean all verilator-build irun-build vcs-build riviera-build program.hex
.PHONY: help clean verilator vcs irun vlog riviera
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