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Branch 1.3

This commit is contained in:
Joseph Rahmeh 2020-11-17 10:58:44 -08:00
parent 2d26189faf
commit 068356d5da
2 changed files with 2 additions and 2 deletions
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2
release-notes.md
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@ -11,7 +11,7 @@
* Zbs and Zbb are enabled by default. Use -set=bitmanip+zb*=1 to enable other sub-extensions.
* Enhancements and additional configurations options for a faster divider
* JTAG controller intial state issue fixed
* Branch predictor fully-associative mode fo 8,16,32 entries.
* Branch predictor fully-associative mode for 8,16,32 entries.
* Corner case bugs fixes related to
* Bus protocol corner cases (ahb)
* Fetch bus error recording improved accuracy

2
swerv_el2.core
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@ -1,6 +1,6 @@
CAPI=2:
name : chipsalliance.org:cores:SweRV_EL2:1.2
name : chipsalliance.org:cores:SweRV_EL2:1.3
filesets:
rtl: