Merge pull request #9 from olofk/mem_lib_fix

Mem lib fix

configs/swerv_config_gen.py

@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
 from fusesoc.capi2.generator import Generator
 import os
 import shutil

design/lib/mem_lib.sv

@@ -28,7 +28,7 @@ module ram_``depth``x``width(               \
 reg [(width-1):0] ram_core [(depth-1):0];   \
                                             \
 always @(posedge CLK) begin              \
-   if (ME && WE) ram_core[ADR] = D;        \
+   if (ME && WE) ram_core[ADR] <= D;        \
    if (ME && ~WE) Q <= ram_core[ADR];       \
 end                                         \
                                             \

swerv_el2.core

@@ -85,7 +85,7 @@ generate:
 
 generators:
   swerv_el2_config:
-    interpreter: python
+    interpreter: python3
     command: configs/swerv_config_gen.py
     description : Create a SweRV EL2 configuration. Note! Only supports the default config