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mlir-hlo/lib/Dialect/mhlo/transforms
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A. Unique TensorFlower d1828625ab [MLIR][KernelGen] Make maximum supported rank in rank specialization configurable 
The maximum supported target rank of 5 is sufficient for all operations but
`select`. Make the maximum target rank configurable in the rank specialization.
This reduces the number of generated kernels for operations that don't require
it.

PiperOrigin-RevId: 376822496
 		2021-06-01 06:54:31 -07:00
..
CMakeLists.txt [MLIR][HLO] Add `rank-specialization-cluster` pass 2021-05-12 03:46:01 -07:00
chlo_legalize_to_hlo.cc Separate CHLO transforms for expanding compositions and lowering broadcasts. 2021-05-18 13:33:59 -07:00
chlo_legalize_to_hlo_pass.cc Separate CHLO transforms for expanding compositions and lowering broadcasts. 2021-05-18 13:33:59 -07:00
chlo_legalize_to_hlo_patterns.td Separate CHLO transforms for expanding compositions and lowering broadcasts. 2021-05-18 13:33:59 -07:00
hlo_legalize_to_lhlo.cc PR #49454: [MLIR][DISC] Upgrade to use the new `reifyReturnTypeShapes` interface. 2021-05-24 10:11:55 -07:00
legalize_control_flow.cc Fix MLIR include paths. 2020-12-17 00:56:04 -08:00
legalize_gather_to_torch_index_select.cc Integrate LLVM at llvm/llvm-project@b24436ac96 2021-03-23 12:20:17 -07:00
legalize_to_linalg.cc [HLO][Linalg] Support scalar broadcasts in point-wise converter 2021-05-31 03:50:23 -07:00
legalize_to_standard.cc Integrate LLVM at llvm/llvm-project@b24436ac96 2021-03-23 12:20:17 -07:00
legalize_to_standard_patterns.td Lowering for mhlo.ceil to std.ceil 2020-08-12 16:15:35 -07:00
legalize_trigonometric_to_approximation.cc Fix tanh lowering for NaN input. 2021-03-24 06:34:36 -07:00
lhlo_fuse_linalg.cc Integrate LLVM at llvm/llvm-project@678241795c 2021-03-16 13:33:00 -07:00
lhlo_legalize_to_affine.cc PR #47315: [MLIR] Add concatenateOp lowering from lmhlo to Affine. 2021-04-14 11:06:38 -07:00
lhlo_legalize_to_gpu.cc [MLIR][NFC] Rename ReduceOp operands() => inputs(). 2021-04-14 12:08:23 -07:00
lhlo_legalize_to_parallel_loops.cc [MLIR][NFC] Rename ReduceOp operands() => inputs(). 2021-04-14 12:08:23 -07:00
lower_complex.cc Integrate LLVM at llvm/llvm-project@b24436ac96 2021-03-23 12:20:17 -07:00
lower_complex_patterns.td Generate Equal and NotEqual kernels for complex types. 2021-04-15 00:35:52 -07:00
lower_general_dot.cc Integrate LLVM at llvm/llvm-project@b24436ac96 2021-03-23 12:20:17 -07:00
materialize_broadcasts.cc More cleanup in mlir-hlo to prepare for the standalone build 2020-08-03 19:28:00 -07:00
materialize_broadcasts_pass.cc Integrate LLVM at llvm/llvm-project@b24436ac96 2021-03-23 12:20:17 -07:00
mhlo_control_flow_to_scf.cc Integrate LLVM at llvm/llvm-project@37e1458128 2021-04-22 22:57:08 -07:00
mhlo_fusion.cc Integrate LLVM at llvm/llvm-project@37e1458128 2021-04-22 22:57:08 -07:00
move_up_dynamic_broadcasts_for_fusion.cc [MLIR][KernelGen] Add MLIR-generated Xlogy kernel 2021-06-01 04:48:18 -07:00
optimize_mhlo.cc More cleanup in mlir-hlo to prepare for the standalone build 2020-08-03 19:28:00 -07:00
optimize_mhlo_pass.cc Integrate LLVM at llvm/llvm-project@b24436ac96 2021-03-23 12:20:17 -07:00
rank_specialization.cc [MLIR][KernelGen] Make maximum supported rank in rank specialization configurable 2021-06-01 06:54:31 -07:00
sink_constants_to_control_flow.cc Enable fallback legalization for MaxPoolGradGrad and MaxPool3DGradGrad ops 2020-11-13 13:49:05 -08:00
test_infer_shaped_type_pass.cc [mlir][hlo] Avoid dyn_cast_or_null when called with getDefiningOp result (NFC) 2021-05-27 00:20:42 -07:00
transform_unranked_hlo.cc Replace !any_of with none_of 2021-05-04 01:55:36 -07:00
unfuse_batch_norm.cc Integrate LLVM at llvm/llvm-project@678241795c 2021-03-16 13:33:00 -07:00
unfuse_batch_norm_pass.cc mlir-hlo-opt: set preloadDialectsInContext to false. 2021-03-30 01:07:14 -07:00