From 20dd6544aae8fefd0c50c2048eb87b9260a0263c Mon Sep 17 00:00:00 2001
From: Alexandre Eichenberger <alexe@us.ibm.com>
Date: Wed, 27 May 2020 19:34:58 -0400
Subject: [PATCH] conv bug fix (#154)

---
 src/Conversion/ONNXToKrnl/NN/Conv.cpp | 2 +-
 test/mlir/onnx/onnx_lowering.mlir     | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/Conversion/ONNXToKrnl/NN/Conv.cpp b/src/Conversion/ONNXToKrnl/NN/Conv.cpp
index 51d17c5..442483c 100644
--- a/src/Conversion/ONNXToKrnl/NN/Conv.cpp
+++ b/src/Conversion/ONNXToKrnl/NN/Conv.cpp
@@ -181,7 +181,7 @@ struct ONNXConvOpLowering : public ConversionPattern {
           biasIndices.emplace_back(kernel);
           auto loadBias = rewriter.create<LoadOp>(loc, biasOperand, kernel);
           auto resultWithBias =
-              rewriter.create<MulFOp>(loc, loadResult, loadBias);
+              rewriter.create<AddFOp>(loc, loadResult, loadBias);
           // Store initializer value into output location.
           rewriter.create<StoreOp>(loc, resultWithBias, alloc, resultIndices);
         }
diff --git a/test/mlir/onnx/onnx_lowering.mlir b/test/mlir/onnx/onnx_lowering.mlir
index 340f9a5..5b2c2cf 100644
--- a/test/mlir/onnx/onnx_lowering.mlir
+++ b/test/mlir/onnx/onnx_lowering.mlir
@@ -1395,7 +1395,7 @@ func @test_conv_bias_no_pad(%arg0 : tensor<1x2x32x64xf32>, %arg1 : tensor<5x2x6x
   // CHECK: }
   // CHECK: [[BIAS1:%.+]] = load [[RES]][%arg3, %arg4, %arg5, %arg6] : memref<1x5x27x58xf32>
   // CHECK: [[BIAS2:%.+]] = load %arg2[%arg4] : memref<5xf32>
-  // CHECK: [[BIAS3:%.+]] = mulf [[BIAS1]], [[BIAS2]] : f32
+  // CHECK: [[BIAS3:%.+]] = addf [[BIAS1]], [[BIAS2]] : f32
   // CHECK: store [[BIAS3]], [[RES]][%arg3, %arg4, %arg5, %arg6] : memref<1x5x27x58xf32>
   // CHECK: }
   // CHECK: }