Lower MaxPoolSingleOutOp to Krnl dialect (#1)
* Lower MaxPoolSingleOutOp to Krnl dialect * Edit comments * Update changes according to the new folder structure * Add MLIR tests * Support ceil_mode * Merge the first two krnl loops into one krnl loop; remove attribute checks * Dynamically allocate memory for the result if the result has unknown dimensions Co-authored-by: Gheorghe-Teodor Bercea <gt.bercea@gmail.com>
This commit is contained in:
Gheorghe-Teodor Bercea
GitHub
parent
e97df0b343
commit
e4c23da4fd
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@ -85,6 +85,7 @@ add_library(onnf_lower_frontend
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conversion/onnx_to_krnl/math/softmax.cpp
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conversion/onnx_to_krnl/nn/conv.cpp
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conversion/onnx_to_krnl/nn/normalization.cpp
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conversion/onnx_to_krnl/nn/pooling.cpp
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conversion/onnx_to_krnl/tensor/identity.cpp
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conversion/onnx_to_krnl/tensor/reshape.cpp
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conversion/onnx_to_krnl/tensor/transpose.cpp
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@ -99,6 +99,7 @@ void FrontendToKrnlLoweringPass::runOnModule() {
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// Neural network
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populateLoweringONNXConvOpPattern(patterns, &getContext());
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populateLoweringONNXNormalizationOpPattern(patterns, &getContext());
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populateLoweringONNXPoolingOpPattern(patterns, &getContext());
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// Entry point
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patterns.insert<ONNXEntryPointLowering>(&getContext());
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@ -0,0 +1,294 @@
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//===----- pooling.cpp - Lowering Pooling Ops -----------------------------===//
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//
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// Copyright 2019 The IBM Research Authors.
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//
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// =============================================================================
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//
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// This file lowers the ONNX Pooling Operators to Krnl dialect.
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//
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//===----------------------------------------------------------------------===//
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#include "src/conversion/onnx_to_krnl/onnx_to_krnl_common.hpp"
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using namespace mlir;
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// Identity values
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template <>
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float getIdentityValue<float, ONNXMaxPoolSingleOutOp>() {
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return (float)-std::numeric_limits<float>::infinity();
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}
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template <>
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int getIdentityValue<int, ONNXMaxPoolSingleOutOp>() {
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return std::numeric_limits<int>::min();
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}
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template <>
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Value mapToLowerScalarOp<ONNXMaxPoolSingleOutOp>(Operation *op,
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ArrayRef<Type> result_types, ArrayRef<Value> operands,
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ConversionPatternRewriter &rewriter) {
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auto loc = op->getLoc();
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Value lhs = operands[0];
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Value rhs = operands[1];
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auto max = rewriter.create<CmpFOp>(loc, CmpFPredicate::OGT, lhs, rhs);
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auto result = rewriter.create<SelectOp>(loc, max, lhs, rhs);
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return result;
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}
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struct ONNXMaxPoolSingleOutOpLowering : public ConversionPattern {
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ONNXMaxPoolSingleOutOpLowering(MLIRContext *ctx)
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: ConversionPattern(
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mlir::ONNXMaxPoolSingleOutOp::getOperationName(), 1, ctx) {}
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PatternMatchResult matchAndRewrite(Operation *op, ArrayRef<Value> operands,
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ConversionPatternRewriter &rewriter) const final {
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auto loc = op->getLoc();
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// Match
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ONNXMaxPoolSingleOutOp poolOp = llvm::dyn_cast<ONNXMaxPoolSingleOutOp>(op);
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// Read kernel_shape attribute
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SmallVector<int, 4> kernelShape;
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auto kernelShapeAttribute = poolOp.kernel_shapeAttr();
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for (auto dim : kernelShapeAttribute.getValue())
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kernelShape.emplace_back(dim.cast<IntegerAttr>().getInt());
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// Read strides attribute
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SmallVector<int, 4> strides;
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auto stridesAttribute = poolOp.stridesAttr();
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for (auto stride : stridesAttribute.getValue())
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strides.emplace_back(stride.cast<IntegerAttr>().getInt());
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// Read ceil_mode attribute
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auto ceilMode = poolOp.ceil_mode().getSExtValue();
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// Read pads attribute
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SmallVector<int, 4> pads;
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auto padsAttribute = poolOp.padsAttr();
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for (auto pad : padsAttribute.getValue())
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pads.emplace_back(pad.cast<IntegerAttr>().getInt());
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// Read dilations attribute
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SmallVector<int, 4> dilations;
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auto dilationsAttribute = poolOp.dilationsAttr();
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for (auto dilation : dilationsAttribute.getValue())
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dilations.emplace_back(dilation.cast<IntegerAttr>().getInt());
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// Type information about the input and result of this operation.
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auto &inputOperand = operands[0];
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auto inputShape = inputOperand.getType().cast<MemRefType>().getShape();
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auto memRefType = convertToMemRefType(*op->result_type_begin());
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auto resultShape = memRefType.getShape();
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auto resultElementType = memRefType.getElementType();
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// Batch indices: N and C dimensions
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int batchRank = 2;
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// Insert an allocation and deallocation for the result of this operation.
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Value alloc;
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bool insertDealloc = checkInsertDealloc(op);
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if (hasAllConstantDimensions(memRefType))
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alloc = insertAllocAndDealloc(memRefType, loc, rewriter, insertDealloc);
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else {
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// Compute dimensions of the result of this operation.
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SmallVector<Value, 2> allocOperands;
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for (int i = 0; i < batchRank; ++i) {
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if (resultShape[i] < 0) {
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auto dim = rewriter.create<DimOp>(loc, inputOperand, i);
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allocOperands.emplace_back(dim);
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}
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}
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Value zero, one;
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if (ceilMode) {
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zero = rewriter.create<ConstantOp>(
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loc, rewriter.getIntegerAttr(rewriter.getIntegerType(64), 0));
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}
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one = rewriter.create<ConstantOp>(
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loc, rewriter.getIntegerAttr(rewriter.getIntegerType(64), 1));
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int spatialRank = resultShape.size() - batchRank;
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for (int i = batchRank; i < resultShape.size(); ++i) {
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if (resultShape[i] < 0) {
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// dim =
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// let numerator = (input + pad - (kernel - 1) * dilation + 1)
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// in let denomitor = stride
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// in
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// if (ceilMode)
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// ceil(numerator / denominator) + 1
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// else
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// floor(numerator / denominator) + 1
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int spatialIndex = i - batchRank;
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// numerator = (input + pad - (kernel - 1) * dilation + 1)
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auto inputDim = rewriter.create<DimOp>(loc, inputOperand, i);
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auto inputVal = rewriter.create<IndexCastOp>(
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loc, inputDim, rewriter.getIntegerType(64));
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int64_t padKernelDilation =
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(pads[spatialIndex] + pads[spatialIndex + spatialRank]) -
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(kernelShape[spatialIndex] - 1) * dilations[spatialIndex] + 1;
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auto padKernelDilationVal = rewriter.create<ConstantOp>(
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loc, rewriter.getIntegerAttr(
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rewriter.getIntegerType(64), padKernelDilation));
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auto numeratorVal =
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rewriter.create<AddIOp>(loc, inputVal, padKernelDilationVal);
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// denominator
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auto denominatorVal = rewriter.create<ConstantOp>(
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loc, rewriter.getIntegerAttr(
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rewriter.getIntegerType(64), strides[spatialIndex]));
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// numerator / denominator
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Value dimVal =
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rewriter.create<SignedDivIOp>(loc, numeratorVal, denominatorVal);
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if (ceilMode) {
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auto remainder = rewriter.create<SignedRemIOp>(
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loc, numeratorVal, denominatorVal);
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auto isZero = rewriter.create<CmpIOp>(
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loc, CmpIPredicate::eq, remainder, zero);
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auto dimPlusOne = rewriter.create<AddIOp>(loc, dimVal, one);
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dimVal = rewriter.create<SelectOp>(loc, isZero, dimVal, dimPlusOne);
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}
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dimVal = rewriter.create<AddIOp>(loc, dimVal, one);
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allocOperands.emplace_back(rewriter.create<IndexCastOp>(
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loc, dimVal, rewriter.getIndexType()));
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}
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}
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alloc = rewriter.create<AllocOp>(loc, memRefType, allocOperands);
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if (insertDealloc) {
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auto *parentBlock = alloc.getDefiningOp()->getBlock();
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auto dealloc = rewriter.create<DeallocOp>(loc, alloc);
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dealloc.getOperation()->moveBefore(&parentBlock->back());
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}
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}
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// R = MaxPool(D)
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//
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// The input/output shapes will look like this:
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//
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// D (NxCxHxW) -> R (NxCxRHxRW)
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//
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// The loop nest will look as follows:
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//
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// strides = [s1, s2]
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//
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// for n = 0 .. N:
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// for c = 0 .. C:
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// for r1 = 0 .. RH:
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// for r2 = 0 .. RW:
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// R[n][c][r1][r2] = negative_infinity;
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// for k1 = 0 .. KH:
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// for k2 = 0 .. KW:
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// t = D[n][c][s1 * r1 + k1][s2 * r2 + k2];
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// R[n][c][r1][r2] = max(R[n][c][r1][r2], t);
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//
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// Naming:
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// n, c, r1, r2: outer loop nest indices
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// k1, k2: inner loop nest indices
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//
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// TODO: handle padding.
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//
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// 1. Define outer loops and emit empty optimization block.
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auto nOuterLoops = resultShape.size();
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BuildKrnlLoop outerLoops(rewriter, loc, nOuterLoops);
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outerLoops.createDefineOptimizeAndIterateOp(alloc);
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rewriter.setInsertionPointToStart(outerLoops.getIterateBlock());
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{
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// 2. Emit the body of the outer loop nest.
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SmallVector<Value, 4> resultIndices;
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for (int i = 0; i < nOuterLoops; ++i)
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resultIndices.emplace_back(outerLoops.getInductionVar(i));
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// 2.1 Emit: R[n][c][r1][r2] = negative_infinity;
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Value identity;
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if (resultElementType.isa<FloatType>()) {
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identity = rewriter.create<ConstantOp>(
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loc, FloatAttr::get(resultElementType,
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getIdentityValue<float, ONNXMaxPoolSingleOutOp>()));
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} else if (resultElementType.isa<IntegerType>()) {
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identity = rewriter.create<ConstantOp>(
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loc, IntegerAttr::get(resultElementType,
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getIdentityValue<int, ONNXMaxPoolSingleOutOp>()));
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} else {
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emitError(loc, "unsupported element type");
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}
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rewriter.create<StoreOp>(loc, identity, alloc, resultIndices);
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// 2.2 Define inner loops.
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int nInnerLoops = kernelShape.size();
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BuildKrnlLoop innerLoops(rewriter, loc, nInnerLoops);
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innerLoops.createDefineAndOptimizeOp();
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// for Kx = 0 .. KX
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for (int i = 0; i < nInnerLoops; ++i)
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innerLoops.pushBounds(0, kernelShape[i]);
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// 2.3 Emit inner loop nest.
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innerLoops.createIterateOp();
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rewriter.setInsertionPointToStart(innerLoops.getIterateBlock());
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{
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// 3. Emit inner loop body
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// t = D[n][c][s1 * r1 + k1][s2 * r2 + k2];
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// R[n][c][r1][r2] = max(R[n][c][r1][r2], t);
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// 3.1 Prepare indices for accesing the data tensor.
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SmallVector<Value, 4> dataIndices;
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// Batch indices: n, c
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for (int i = 0; i < batchRank; ++i)
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dataIndices.emplace_back(outerLoops.getInductionVar(i));
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// Spatial indices: sX * rX + kX
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for (int i = batchRank; i < nOuterLoops; ++i) {
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Value spatialIndex = outerLoops.getInductionVar(i);
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// If strides are present then emit the correct access index.
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if (stridesAttribute && strides[i - batchRank] > 1) {
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spatialIndex = rewriter.create<MulIOp>(loc,
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rewriter.create<ConstantIndexOp>(loc, strides[i - batchRank]),
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outerLoops.getInductionVar(i));
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}
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spatialIndex = rewriter.create<AddIOp>(
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loc, spatialIndex, innerLoops.getInductionVar(i - batchRank));
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// If ceil mode is enabled, then the calculated access index may
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// exceed its dimension. In such a case, we will use the maximum
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// index, which causes multiple visits to the element of the
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// maximum index.
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// TODO: Avoid multiple visits.
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if (ceilMode) {
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Value inputIndex;
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if (inputShape[i] < 0) {
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Value inputDim = rewriter.create<DimOp>(loc, inputOperand, i);
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Value one = rewriter.create<ConstantIndexOp>(loc, 1);
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inputIndex = rewriter.create<SubIOp>(loc, inputDim, one);
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} else {
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inputIndex =
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rewriter.create<ConstantIndexOp>(loc, inputShape[i] - 1);
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}
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auto greaterCondition = rewriter.create<CmpIOp>(
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loc, CmpIPredicate::sgt, spatialIndex, inputIndex);
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spatialIndex = rewriter.create<SelectOp>(
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loc, greaterCondition, inputIndex, spatialIndex);
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}
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dataIndices.emplace_back(spatialIndex);
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}
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// 3.2 Do pooling.
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auto loadData = rewriter.create<LoadOp>(loc, inputOperand, dataIndices);
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auto loadPartialResult =
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rewriter.create<LoadOp>(loc, alloc, resultIndices);
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Value result = mapToLowerScalarOp<ONNXMaxPoolSingleOutOp>(
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op, resultElementType, {loadPartialResult, loadData}, rewriter);
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rewriter.create<StoreOp>(loc, result, alloc, resultIndices);
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}
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}
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rewriter.replaceOp(op, alloc);
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return matchSuccess();
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}
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};
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void populateLoweringONNXPoolingOpPattern(
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OwningRewritePatternList &patterns, MLIRContext *ctx) {
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patterns.insert<ONNXMaxPoolSingleOutOpLowering>(ctx);
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}
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@ -202,6 +202,9 @@ void populateLoweringONNXConvOpPattern(
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void populateLoweringONNXNormalizationOpPattern(
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OwningRewritePatternList &patterns, MLIRContext *ctx);
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void populateLoweringONNXPoolingOpPattern(
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OwningRewritePatternList &patterns, MLIRContext *ctx);
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// `tensor` directory methods:
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void populateLoweringONNXUnsqueezeOpPattern(
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@ -305,6 +305,13 @@ test_to_enable = [
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"test_batchnorm_epsilon_cpu",
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"test_batchnorm_example_cpu",
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# Pooling
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"test_maxpool_1d_default_cpu",
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"test_maxpool_2d_ceil_cpu",
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"test_maxpool_2d_default_cpu",
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"test_maxpool_2d_strides_cpu",
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"test_maxpool_3d_default_cpu",
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]
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# Extract name of all test cases.
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@ -1344,3 +1344,169 @@ func @test_batchnorm_testmode_1d(%arg0: tensor<10xf32>, %arg1: tensor<1xf32>, %a
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// CHECK: return [[RES]] : memref<10xf32>
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}
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func @test_maxpooling_singleout_no_pad(%arg0 : tensor<1x3x32x32xf32>) -> tensor<*xf32> {
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%0 = "onnx.MaxPoolSingleOut"(%arg0) {auto_pad = "NOTSET", kernel_shape = [2, 2]} : (tensor<1x3x32x32xf32>) -> tensor<*xf32>
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"std.return"(%0) : (tensor<*xf32>) -> ()
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// CHECK-LABEL: test_maxpooling_singleout_no_pad
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// CHECK: [[RES:%.+]] = alloc() : memref<1x3x31x31xf32>
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// CHECK: [[DEF_LOOPS_0:%.+]]:4 = krnl.define_loops 4
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// CHECK: [[OPT_LOOPS_0:%.+]]:4 = krnl.optimize_loops {
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// CHECK: krnl.return_loops [[DEF_LOOPS_0]]#0, [[DEF_LOOPS_0]]#1, [[DEF_LOOPS_0]]#2, [[DEF_LOOPS_0]]#3
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// CHECK: } : () -> (!krnl.loop, !krnl.loop, !krnl.loop, !krnl.loop)
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// CHECK: krnl.iterate([[OPT_LOOPS_0]]#0, [[OPT_LOOPS_0]]#1, [[OPT_LOOPS_0]]#2, [[OPT_LOOPS_0]]#3) with ([[DEF_LOOPS_0]]#0 -> %arg1 = 0 to 1, [[DEF_LOOPS_0]]#1 -> %arg2 = 0 to 3, [[DEF_LOOPS_0]]#2 -> %arg3 = 0 to 31, [[DEF_LOOPS_0]]#3 -> %arg4 = 0 to 31) {
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// CHECK: [[NEGATIVE_INFINITY:%.+]] = constant 0xFF800000 : f32
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// CHECK: store [[NEGATIVE_INFINITY]], [[RES]][%arg1, %arg2, %arg3, %arg4] : memref<1x3x31x31xf32>
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// CHECK: [[DEF_LOOPS_1:%.+]]:2 = krnl.define_loops 2
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// CHECK: [[OPT_LOOPS_1:%.+]]:2 = krnl.optimize_loops {
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// CHECK: krnl.return_loops [[DEF_LOOPS_1]]#0, [[DEF_LOOPS_1]]#1
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// CHECK: } : () -> (!krnl.loop, !krnl.loop)
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// CHECK: krnl.iterate([[OPT_LOOPS_1]]#0, [[OPT_LOOPS_1]]#1) with ([[DEF_LOOPS_1]]#0 -> %arg5 = 0 to 2, [[DEF_LOOPS_1]]#1 -> %arg6 = 0 to 2) {
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// CHECK: [[H:%.+]] = addi %arg3, %arg5 : index
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// CHECK: [[W:%.+]] = addi %arg4, %arg6 : index
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// CHECK: [[LOAD_X:%.+]] = load %arg0[%arg1, %arg2, [[H]], [[W]]] : memref<1x3x32x32xf32>
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// CHECK: [[LOAD_Y:%.+]] = load [[RES]][%arg1, %arg2, %arg3, %arg4] : memref<1x3x31x31xf32>
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// CHECK: [[COMPARE:%.+]] = cmpf "ogt", [[LOAD_Y]], [[LOAD_X]] : f32
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// CHECK: [[SELECT:%.+]] = select [[COMPARE]], [[LOAD_Y]], [[LOAD_X]] : f32
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// CHECK: store [[SELECT]], [[RES]][%arg1, %arg2, %arg3, %arg4] : memref<1x3x31x31xf32>
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// CHECK: }
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// CHECK: }
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// CHECK: return [[RES]] : memref<1x3x31x31xf32>
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}
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func @test_maxpooling_singleout_no_pad_w_strides(%arg0 : tensor<1x3x32x32xf32>) -> tensor<*xf32> {
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%0 = "onnx.MaxPoolSingleOut"(%arg0) {auto_pad = "NOTSET", kernel_shape = [2, 2], strides = [2, 2]} : (tensor<1x3x32x32xf32>) -> tensor<*xf32>
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"std.return"(%0) : (tensor<*xf32>) -> ()
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// CHECK-LABEL: test_maxpooling_singleout_no_pad_w_strides
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// CHECK: [[RES:%.+]] = alloc() : memref<1x3x16x16xf32>
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// CHECK: [[DEF_LOOPS_0:%.+]]:4 = krnl.define_loops 4
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// CHECK: [[OPT_LOOPS_0:%.+]]:4 = krnl.optimize_loops {
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// CHECK: krnl.return_loops [[DEF_LOOPS_0]]#0, [[DEF_LOOPS_0]]#1, [[DEF_LOOPS_0]]#2, [[DEF_LOOPS_0]]#3
|
||||
// CHECK: } : () -> (!krnl.loop, !krnl.loop, !krnl.loop, !krnl.loop)
|
||||
// CHECK: krnl.iterate([[OPT_LOOPS_0]]#0, [[OPT_LOOPS_0]]#1, [[OPT_LOOPS_0]]#2, [[OPT_LOOPS_0]]#3) with ([[DEF_LOOPS_0]]#0 -> %arg1 = 0 to 1, [[DEF_LOOPS_0]]#1 -> %arg2 = 0 to 3, [[DEF_LOOPS_0]]#2 -> %arg3 = 0 to 16, [[DEF_LOOPS_0]]#3 -> %arg4 = 0 to 16) {
|
||||
// CHECK: [[NEGATIVE_INFINITY:%.+]] = constant 0xFF800000 : f32
|
||||
// CHECK: store [[NEGATIVE_INFINITY]], [[RES]][%arg1, %arg2, %arg3, %arg4] : memref<1x3x16x16xf32>
|
||||
// CHECK: [[DEF_LOOPS_1:%.+]]:2 = krnl.define_loops 2
|
||||
// CHECK: [[OPT_LOOPS_1:%.+]]:2 = krnl.optimize_loops {
|
||||
// CHECK: krnl.return_loops [[DEF_LOOPS_1]]#0, [[DEF_LOOPS_1]]#1
|
||||
// CHECK: } : () -> (!krnl.loop, !krnl.loop)
|
||||
// CHECK: krnl.iterate([[OPT_LOOPS_1]]#0, [[OPT_LOOPS_1]]#1) with ([[DEF_LOOPS_1]]#0 -> %arg5 = 0 to 2, [[DEF_LOOPS_1]]#1 -> %arg6 = 0 to 2) {
|
||||
// CHECK: [[STRIDE_0:%.+]] = constant 2 : index
|
||||
// CHECK: [[MUL_0:%.+]] = muli [[STRIDE_0]], %arg3 : index
|
||||
// CHECK: [[H:%.+]] = addi [[MUL_0]], %arg5 : index
|
||||
// CHECK: [[STRIDE_1:%.+]] = constant 2 : index
|
||||
// CHECK: [[MUL_1:%.+]] = muli [[STRIDE_1]], %arg4 : index
|
||||
// CHECK: [[W:%.+]] = addi [[MUL_1]], %arg6 : index
|
||||
// CHECK: [[LOAD_X:%.+]] = load %arg0[%arg1, %arg2, [[H]], [[W]]] : memref<1x3x32x32xf32>
|
||||
// CHECK: [[LOAD_Y:%.+]] = load [[RES]][%arg1, %arg2, %arg3, %arg4] : memref<1x3x16x16xf32>
|
||||
// CHECK: [[COMPARE:%.+]] = cmpf "ogt", [[LOAD_Y]], [[LOAD_X]] : f32
|
||||
// CHECK: [[SELECT:%.+]] = select [[COMPARE]], [[LOAD_Y]], [[LOAD_X]] : f32
|
||||
// CHECK: store [[SELECT]], [[RES]][%arg1, %arg2, %arg3, %arg4] : memref<1x3x16x16xf32>
|
||||
// CHECK: }
|
||||
// CHECK: }
|
||||
// CHECK: return [[RES]] : memref<1x3x16x16xf32>
|
||||
}
|
||||
|
||||
func @test_maxpooling_singleout_no_pad_w_strides_w_ceil_mode(%arg0 : tensor<1x3x32x32xf32>) -> tensor<*xf32> {
|
||||
%0 = "onnx.MaxPoolSingleOut"(%arg0) {auto_pad = "NOTSET", kernel_shape = [3, 3], strides = [2, 2], ceil_mode = 1} : (tensor<1x3x32x32xf32>) -> tensor<*xf32>
|
||||
"std.return"(%0) : (tensor<*xf32>) -> ()
|
||||
|
||||
// CHECK-LABEL: test_maxpooling_singleout_no_pad_w_strides_w_ceil_mode
|
||||
// CHECK: [[RES:%.+]] = alloc() : memref<1x3x16x16xf32>
|
||||
// CHECK: [[DEF_LOOPS_0:%.+]]:4 = krnl.define_loops 4
|
||||
// CHECK: [[OPT_LOOPS_0:%.+]]:4 = krnl.optimize_loops {
|
||||
// CHECK: krnl.return_loops [[DEF_LOOPS_0]]#0, [[DEF_LOOPS_0]]#1, [[DEF_LOOPS_0]]#2, [[DEF_LOOPS_0]]#3
|
||||
// CHECK: } : () -> (!krnl.loop, !krnl.loop, !krnl.loop, !krnl.loop)
|
||||
// CHECK: krnl.iterate([[OPT_LOOPS_0]]#0, [[OPT_LOOPS_0]]#1, [[OPT_LOOPS_0]]#2, [[OPT_LOOPS_0]]#3) with ([[DEF_LOOPS_0]]#0 -> %arg1 = 0 to 1, [[DEF_LOOPS_0]]#1 -> %arg2 = 0 to 3, [[DEF_LOOPS_0]]#2 -> %arg3 = 0 to 16, [[DEF_LOOPS_0]]#3 -> %arg4 = 0 to 16) {
|
||||
// CHECK: [[NEGATIVE_INFINITY:%.+]] = constant 0xFF800000 : f32
|
||||
// CHECK: store [[NEGATIVE_INFINITY]], [[RES]][%arg1, %arg2, %arg3, %arg4] : memref<1x3x16x16xf32>
|
||||
// CHECK: [[DEF_LOOPS_1:%.+]]:2 = krnl.define_loops 2
|
||||
// CHECK: [[OPT_LOOPS_1:%.+]]:2 = krnl.optimize_loops {
|
||||
// CHECK: krnl.return_loops [[DEF_LOOPS_1]]#0, [[DEF_LOOPS_1]]#1
|
||||
// CHECK: } : () -> (!krnl.loop, !krnl.loop)
|
||||
// CHECK: krnl.iterate([[OPT_LOOPS_1]]#0, [[OPT_LOOPS_1]]#1) with ([[DEF_LOOPS_1]]#0 -> %arg5 = 0 to 3, [[DEF_LOOPS_1]]#1 -> %arg6 = 0 to 3) {
|
||||
// CHECK: [[STRIDE_0:%.+]] = constant 2 : index
|
||||
// CHECK: [[MUL_0:%.+]] = muli [[STRIDE_0]], %arg3 : index
|
||||
// CHECK: [[SPATIAL_H:%.+]] = addi [[MUL_0]], %arg5 : index
|
||||
// CHECK: [[INPUT_INDEX_0:%.+]] = constant 31 : index
|
||||
// CHECK: [[CMP_0:%.+]] = cmpi "sgt", [[SPATIAL_H]], [[INPUT_INDEX_0]] : index
|
||||
// CHECK: [[H:%.+]] = select [[CMP_0]], [[INPUT_INDEX_0]], [[SPATIAL_H]] : index
|
||||
// CHECK: [[STRIDE_1:%.+]] = constant 2 : index
|
||||
// CHECK: [[MUL_1:%.+]] = muli [[STRIDE_1]], %arg4 : index
|
||||
// CHECK: [[SPATIAL_W:%.+]] = addi [[MUL_1]], %arg6 : index
|
||||
// CHECK: [[INPUT_INDEX_1:%.+]] = constant 31 : index
|
||||
// CHECK: [[CMP_1:%.+]] = cmpi "sgt", [[SPATIAL_W]], [[INPUT_INDEX_1]] : index
|
||||
// CHECK: [[W:%.+]] = select [[CMP_1]], [[INPUT_INDEX_1]], [[SPATIAL_W]] : index
|
||||
// CHECK: [[LOAD_X:%.+]] = load %arg0[%arg1, %arg2, [[H]], [[W]]] : memref<1x3x32x32xf32>
|
||||
// CHECK: [[LOAD_Y:%.+]] = load [[RES]][%arg1, %arg2, %arg3, %arg4] : memref<1x3x16x16xf32>
|
||||
// CHECK: [[CMP_2:%.+]] = cmpf "ogt", [[LOAD_Y]], [[LOAD_X]] : f32
|
||||
// CHECK: [[SELECT:%.+]] = select [[CMP_2]], [[LOAD_Y]], [[LOAD_X]] : f32
|
||||
// CHECK: store [[SELECT]], [[RES]][%arg1, %arg2, %arg3, %arg4] : memref<1x3x16x16xf32>
|
||||
// CHECK: }
|
||||
// CHECK: }
|
||||
// CHECK: return [[RES]] : memref<1x3x16x16xf32>
|
||||
}
|
||||
|
||||
func @test_maxpooling_singleout_no_pad_w_strides_w_ceil_mode_w_unknown_dims(%arg0 : tensor<?x3x?x32xf32>) -> tensor<*xf32> {
|
||||
%0 = "onnx.MaxPoolSingleOut"(%arg0) {auto_pad = "NOTSET", kernel_shape = [3, 3], strides = [2, 2], ceil_mode = 1} : (tensor<?x3x?x32xf32>) -> tensor<*xf32>
|
||||
"std.return"(%0) : (tensor<*xf32>) -> ()
|
||||
|
||||
// CHECK-LABEL: test_maxpooling_singleout_no_pad_w_strides_w_ceil_mode_w_unknown_dims
|
||||
|
||||
// CHECK: [[DIM_0:%.+]] = dim %arg0, 0 : memref<?x3x?x32xf32>
|
||||
// CHECK: [[ZERO:%.+]] = constant 0 : i64
|
||||
// CHECK: [[ONE:%.+]] = constant 1 : i64
|
||||
// CHECK: [[DIM_1:%.+]] = dim %arg0, 2 : memref<?x3x?x32xf32>
|
||||
// CHECK: [[DIM_1_i64:%.+]] = index_cast [[DIM_1]] : index to i64
|
||||
// CHECK: [[KERNEL_PAD_DILATION:%.+]] = constant -1 : i64
|
||||
// CHECK: [[NUMERATOR:%.+]] = addi [[DIM_1_i64]], [[KERNEL_PAD_DILATION]] : i64
|
||||
// CHECK: [[DENOMINATOR:%.+]] = constant 2 : i64
|
||||
// CHECK: [[DIV:%.+]] = divi_signed [[NUMERATOR]], [[DENOMINATOR]] : i64
|
||||
// CHECK: [[REMAINDER:%.+]] = remi_signed [[NUMERATOR]], [[DENOMINATOR]] : i64
|
||||
// CHECK: [[IS_ZERO:%.+]] = cmpi "eq", [[REMAINDER]], [[ZERO]] : i64
|
||||
// CHECK: [[DIV_PLUS_ONE:%.+]] = addi [[DIV]], [[ONE]] : i64
|
||||
// CHECK: [[SELECT:%.+]] = select [[IS_ZERO]], [[DIV]], [[DIV_PLUS_ONE]] : i64
|
||||
// CHECK: [[SELECT_PLUS_ONE:%.+]] = addi [[SELECT]], [[ONE]] : i64
|
||||
// CHECK: [[DIM_1_FINAL:%.+]] = index_cast [[SELECT_PLUS_ONE]] : i64 to index
|
||||
// CHECK: [[RES:%.+]] = alloc([[DIM_0]], [[DIM_1_FINAL]]) : memref<?x3x?x16xf32>
|
||||
|
||||
// CHECK: [[DEF_LOOPS_0:%.+]]:4 = krnl.define_loops 4
|
||||
// CHECK: [[OPT_LOOPS_0:%.+]]:4 = krnl.optimize_loops {
|
||||
// CHECK: krnl.return_loops [[DEF_LOOPS_0]]#0, [[DEF_LOOPS_0]]#1, [[DEF_LOOPS_0]]#2, [[DEF_LOOPS_0]]#3
|
||||
// CHECK: } : () -> (!krnl.loop, !krnl.loop, !krnl.loop, !krnl.loop)
|
||||
// CHECK: [[DIM_2:%.+]] = dim [[RES]], 0 : memref<?x3x?x16xf32>
|
||||
// CHECK: [[DIM_3:%.+]] = dim [[RES]], 2 : memref<?x3x?x16xf32>
|
||||
// CHECK: krnl.iterate([[OPT_LOOPS_0]]#0, [[OPT_LOOPS_0]]#1, [[OPT_LOOPS_0]]#2, [[OPT_LOOPS_0]]#3) with ([[DEF_LOOPS_0]]#0 -> %arg1 = 0 to [[DIM_2]], [[DEF_LOOPS_0]]#1 -> %arg2 = 0 to 3, [[DEF_LOOPS_0]]#2 -> %arg3 = 0 to [[DIM_3]], [[DEF_LOOPS_0]]#3 -> %arg4 = 0 to 16) {
|
||||
// CHECK: [[NEGATIVE_INFINITY:%.+]] = constant 0xFF800000 : f32
|
||||
// CHECK: store [[NEGATIVE_INFINITY]], [[RES]][%arg1, %arg2, %arg3, %arg4] : memref<?x3x?x16xf32>
|
||||
// CHECK: [[DEF_LOOPS_1:%.+]]:2 = krnl.define_loops 2
|
||||
// CHECK: [[OPT_LOOPS_1:%.+]]:2 = krnl.optimize_loops {
|
||||
// CHECK: krnl.return_loops [[DEF_LOOPS_1]]#0, [[DEF_LOOPS_1]]#1
|
||||
// CHECK: } : () -> (!krnl.loop, !krnl.loop)
|
||||
// CHECK: krnl.iterate([[OPT_LOOPS_1]]#0, [[OPT_LOOPS_1]]#1) with ([[DEF_LOOPS_1]]#0 -> %arg5 = 0 to 3, [[DEF_LOOPS_1]]#1 -> %arg6 = 0 to 3) {
|
||||
// CHECK: [[STRIDE_0:%.+]] = constant 2 : index
|
||||
// CHECK: [[MUL_0:%.+]] = muli [[STRIDE_0]], %arg3 : index
|
||||
// CHECK: [[SPATIAL_H:%.+]] = addi [[MUL_0]], %arg5 : index
|
||||
// CHECK: [[DIM_0_0:%.+]] = dim %arg0, 2 : memref<?x3x?x32xf32>
|
||||
// CHECK: [[ONE_INDEX:%.+]] = constant 1 : index
|
||||
// CHECK: [[INPUT_INDEX_0:%.+]] = subi [[DIM_0_0]], [[ONE_INDEX]] : index
|
||||
// CHECK: [[CMP_0:%.+]] = cmpi "sgt", [[SPATIAL_H]], [[INPUT_INDEX_0]] : index
|
||||
// CHECK: [[H:%.+]] = select [[CMP_0]], [[INPUT_INDEX_0]], [[SPATIAL_H]] : index
|
||||
|
||||
// CHECK: [[STRIDE_1:%.+]] = constant 2 : index
|
||||
// CHECK: [[MUL_1:%.+]] = muli [[STRIDE_1]], %arg4 : index
|
||||
// CHECK: [[SPATIAL_W:%.+]] = addi [[MUL_1]], %arg6 : index
|
||||
// CHECK: [[INPUT_INDEX_1:%.+]] = constant 31 : index
|
||||
// CHECK: [[CMP_1:%.+]] = cmpi "sgt", [[SPATIAL_W]], [[INPUT_INDEX_1]] : index
|
||||
// CHECK: [[W:%.+]] = select [[CMP_1]], [[INPUT_INDEX_1]], [[SPATIAL_W]] : index
|
||||
|
||||
// CHECK: [[LOAD_X:%.+]] = load %arg0[%arg1, %arg2, [[H]], [[W]]] : memref<?x3x?x32xf32>
|
||||
// CHECK: [[LOAD_Y:%.+]] = load [[RES]][%arg1, %arg2, %arg3, %arg4] : memref<?x3x?x16xf32>
|
||||
// CHECK: [[CMP_2:%.+]] = cmpf "ogt", [[LOAD_Y]], [[LOAD_X]] : f32
|
||||
// CHECK: [[SELECT:%.+]] = select [[CMP_2]], [[LOAD_Y]], [[LOAD_X]] : f32
|
||||
// CHECK: store [[SELECT]], [[RES]][%arg1, %arg2, %arg3, %arg4] : memref<?x3x?x16xf32>
|
||||
// CHECK: }
|
||||
// CHECK: }
|
||||
// CHECK: return [[RES]] : memref<?x3x?x16xf32>
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue