onnx-mlir

Commit Graph

Author	SHA1	Message	Date
TUNG LEDUC	c3ef1d93ae	[MLIR] Lower ONNX element-wise binary ops: Mul, Div, Sub, And, Or, Xor (#388 ) * Lower ONNX element-wise binary ops: Mul, Div, Sub, And, Or, Xor * Edit gen_doc.py to avoid changes about AnyTypeOf<[AnyMemRef, AnyTensor]> * Miss a space * Add tests * Shorten ONNXElementWiseBinaryOpLowering into ONNXEWBinaryOpLowering * Move lowering patterns into runOnModule() * Redundant space	2019-12-21 01:35:31 -05:00
GHEORGHE-TEOD BERCEA	7fb2f80dce	[MLIR] Add support for dealloc insertion (#386 ) * Add support for dealloc op. * Check dealloc for returned result not present.	2019-12-21 01:34:48 -05:00

Author

SHA1

Message

Date

TUNG LEDUC

c3ef1d93ae

[MLIR] Lower ONNX element-wise binary ops: Mul, Div, Sub, And, Or, Xor (#388 )

* Lower ONNX element-wise binary ops: Mul, Div, Sub, And, Or, Xor

* Edit gen_doc.py to avoid changes about AnyTypeOf<[AnyMemRef, AnyTensor]>

* Miss a space

* Add tests

* Shorten ONNXElementWiseBinaryOpLowering into ONNXEWBinaryOpLowering

* Move lowering patterns into runOnModule()

* Redundant space

2019-12-21 01:35:31 -05:00

GHEORGHE-TEOD BERCEA

7fb2f80dce

[MLIR] Add support for dealloc insertion (#386 )

* Add support for dealloc op.

* Check dealloc for returned result not present.

2019-12-21 01:34:48 -05:00

2 Commits