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TUNG LEDUC c3ef1d93ae [MLIR] Lower ONNX element-wise binary ops: Mul, Div, Sub, And, Or, Xor (#388) 
* Lower ONNX element-wise binary ops: Mul, Div, Sub, And, Or, Xor

* Edit gen_doc.py to avoid changes about AnyTypeOf<[AnyMemRef, AnyTensor]>

* Miss a space

* Add tests

* Shorten ONNXElementWiseBinaryOpLowering into ONNXEWBinaryOpLowering

* Move lowering patterns into runOnModule()

* Redundant space
 		2019-12-21 01:35:31 -05:00
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onnx_canonicalization.mlir [MLIR] Add one more test case for MatMul-Add fusion (#380) 2019-12-21 00:51:54 -05:00
onnx_lowering.mlir [MLIR] Lower ONNX element-wise binary ops: Mul, Div, Sub, And, Or, Xor (#388) 2019-12-21 01:35:31 -05:00
onnx_lowering_with_dealloc.mlir [MLIR] Lower ONNX element-wise binary ops: Mul, Div, Sub, And, Or, Xor (#388) 2019-12-21 01:35:31 -05:00