31 lines
711 B
Diff
31 lines
711 B
Diff
|
--- a/riscv/processor.cc
|
||
|
|
+++ b/riscv/processor.cc
|
||
|
|
@@ -201,9 +201,10 @@ void processor_t::set_privilege(reg_t prv)
|
||
|
|
|
||
|
|
void processor_t::take_trap(trap_t& t, reg_t epc)
|
||
|
|
{
|
||
|
|
- if (debug)
|
||
|
|
+ // if (debug)
|
||
|
|
fprintf(stderr, "core %3d: exception %s, epc 0x%016" PRIx64 "\n",
|
||
|
|
id, t.name(), epc);
|
||
|
|
+ exit(1);
|
||
|
|
|
||
|
|
// by default, trap to M-mode, unless delegated to S-mode
|
||
|
|
reg_t bit = t.cause();
|
||
|
|
--- a/riscv/insns/c_ebreak.h
|
||
|
|
+++ b/riscv/insns/c_ebreak.h
|
||
|
|
@@ -1,2 +1,6 @@
|
||
|
|
require_extension('C');
|
||
|
|
+
|
||
|
|
+fprintf(stderr, "sbreak\n");
|
||
|
|
+exit(0);
|
||
|
|
+
|
||
|
|
throw trap_breakpoint();
|
||
|
|
--- a/riscv/insns/sbreak.h
|
||
|
|
+++ b/riscv/insns/sbreak.h
|
||
|
|
@@ -1 +1,4 @@
|
||
|
|
+fprintf(stderr, "sbreak\n");
|
||
|
|
+exit(0);
|
||
|
|
+
|
||
|
|
throw trap_breakpoint();
|