picorv32/scripts/torture/.gitignore

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2016-04-08 22:52:40 +08:00
.looplog
riscv-fesvr
riscv-isa-sim
riscv-torture
2016-04-08 22:52:40 +08:00
tests
test.S
test.elf
test.bin
test.hex
test.ref
test.vvp