diff --git a/scripts/quartus/Makefile b/scripts/quartus/Makefile
index 49be1ca..318f7b3 100644
--- a/scripts/quartus/Makefile
+++ b/scripts/quartus/Makefile
@@ -57,5 +57,6 @@ table.txt:
 
 clean:
 	rm -rf firmware.bin firmware.elf firmware.hex firmware.map synth_*.log
-	rm -rf synth_*.mmi synth_*.bit synth_system.v table.txt tab_*/ 
+	rm -rf synth_system.v table.txt tab_*/ 
+	rm -rf synth_area_*_build
 
diff --git a/scripts/quartus/synth_area_large.qsf b/scripts/quartus/synth_area_large.qsf
new file mode 100644
index 0000000..c09700b
--- /dev/null
+++ b/scripts/quartus/synth_area_large.qsf
@@ -0,0 +1,6 @@
+set_global_assignment -name DEVICE ep4ce40f29c7
+set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
+set_global_assignment -name TOP_LEVEL_ENTITY top_large
+set_global_assignment -name VERILOG_FILE ../synth_area_top.v
+set_global_assignment -name VERILOG_FILE ../../../picorv32.v
+set_global_assignment -name SDC_FILE ../synth_area.sdc
diff --git a/scripts/quartus/synth_area_large.tcl b/scripts/quartus/synth_area_large.tcl
deleted file mode 100644
index af611b5..0000000
--- a/scripts/quartus/synth_area_large.tcl
+++ /dev/null
@@ -1,10 +0,0 @@
-read_verilog ../../picorv32.v
-read_verilog synth_area_top.v
-read_xdc synth_area.xdc
-
-synth_design -part xc7k70t-fbg676 -top top_large
-opt_design -sweep -propconst -resynth_seq_area
-opt_design -directive ExploreSequentialArea
-
-report_utilization
-report_timing
diff --git a/scripts/quartus/synth_area_regular.qsf b/scripts/quartus/synth_area_regular.qsf
new file mode 100644
index 0000000..8507413
--- /dev/null
+++ b/scripts/quartus/synth_area_regular.qsf
@@ -0,0 +1,6 @@
+set_global_assignment -name DEVICE ep4ce40f29c7
+set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
+set_global_assignment -name TOP_LEVEL_ENTITY top_regular
+set_global_assignment -name VERILOG_FILE ../synth_area_top.v
+set_global_assignment -name VERILOG_FILE ../../../picorv32.v
+set_global_assignment -name SDC_FILE ../synth_area.sdc
diff --git a/scripts/quartus/synth_area_regular.tcl b/scripts/quartus/synth_area_regular.tcl
deleted file mode 100644
index 2bf6b4c..0000000
--- a/scripts/quartus/synth_area_regular.tcl
+++ /dev/null
@@ -1,10 +0,0 @@
-read_verilog ../../picorv32.v
-read_verilog synth_area_top.v
-read_xdc synth_area.xdc
-
-synth_design -part xc7k70t-fbg676 -top top_regular
-opt_design -sweep -propconst -resynth_seq_area
-opt_design -directive ExploreSequentialArea
-
-report_utilization
-report_timing
diff --git a/scripts/quartus/synth_area_small.qsf b/scripts/quartus/synth_area_small.qsf
index 7f151a8..048ff96 100644
--- a/scripts/quartus/synth_area_small.qsf
+++ b/scripts/quartus/synth_area_small.qsf
@@ -1,4 +1,4 @@
-set_global_assignment -name DEVICE ep4ce30f23c7
+set_global_assignment -name DEVICE ep4ce40f29c7
 set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
 set_global_assignment -name TOP_LEVEL_ENTITY top_small
 set_global_assignment -name VERILOG_FILE ../synth_area_top.v