diff --git a/Makefile b/Makefile
index a4196bd..2bc6718 100644
--- a/Makefile
+++ b/Makefile
@@ -22,8 +22,14 @@ CFLAGS = -MD -O3 -mabi=ilp32 -march=rv32im -DTIME -DRISCV
 GIT_ENV = true
 
 test_verilator: build/testbench_verilator build/firmware.hex build/dhry.hex
-	./build/testbench_verilator build/firmware.hex
-	./build/testbench_verilator build/dhry.hex
+	cd build && ./testbench_verilator firmware.hex
+	cd build && ./testbench_verilator dhry.hex
+
+firmware: build/testbench_verilator
+	cd build && ./testbench_verilator firmware.hex
+
+dhry: build/firmware.hex build/dhry.hex
+	cd build && ./testbench_verilator dhry.hex
 
 build/testbench_verilator: testbench_wb.v picorv32.v testbench.cc
 	$(VERILATOR) --cc --exe -Wno-lint -trace --top-module picorv32_wrapper testbench_wb.v picorv32.v testbench.cc \
diff --git a/testbench_wb.v b/testbench_wb.v
index 5c350cc..7bf433e 100644
--- a/testbench_wb.v
+++ b/testbench_wb.v
@@ -142,6 +142,11 @@ module picorv32_wb #(
 
   assign mem_ready = 1;
 
+  integer fconsole;
+  initial begin
+    fconsole = $fopen("console.log", "w");
+  end
+
   always @(posedge clk) begin
     mem_rdata[7:0]   <= mem_la_read ? memory[mem_la_addr+0] : 'bx;
     mem_rdata[15:8]  <= mem_la_read ? memory[mem_la_addr+1] : 'bx;
@@ -150,8 +155,7 @@ module picorv32_wb #(
     if (mem_la_write) begin
       case (mem_la_addr)
         32'h1000_0000: begin
-          $write("%c", mem_la_wdata);
-          $fflush();
+          $fwrite(fconsole, "%c", mem_la_wdata);
         end
         32'h2000_0000: begin
           if (mem_la_wdata[31:0] == 123456789) exit = 1;