Improve PicoSoC demo firmware
This commit is contained in:
Clifford Wolf
parent
506cda5ee6
commit
2cc1256ce7
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@ -32,7 +32,7 @@ hx8kdemo.blif: hx8kdemo.v spimemio.v simpleuart.v picosoc.v ../picorv32.v
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yosys -ql hx8kdemo.log -p 'synth_ice40 -top hx8kdemo -blif hx8kdemo.blif' $^
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hx8kdemo_tb.vvp: hx8kdemo_tb.v hx8kdemo.v spimemio.v simpleuart.v picosoc.v ../picorv32.v spiflash.v
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iverilog -s testbench -o $@ $^ `yosys-config --datdir/ice40/cells_sim.v`
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iverilog -s testbench -o $@ -D DEBUGREGS $^ `yosys-config --datdir/ice40/cells_sim.v`
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hx8kdemo_syn_tb.vvp: hx8kdemo_tb.v hx8kdemo_syn.v spiflash.v
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iverilog -s testbench -o $@ $^ `yosys-config --datdir/ice40/cells_sim.v`
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@ -9,6 +9,26 @@ extern uint32_t sram;
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#define reg_uart_data (*(volatile uint32_t*)0x02000008)
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#define reg_leds (*(volatile uint32_t*)0x03000000)
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// --------------------------------------------------------
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extern uint32_t flashio_worker_begin;
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extern uint32_t flashio_worker_end;
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void flashio(uint8_t *data, int len)
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{
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uint32_t func[&flashio_worker_end - &flashio_worker_begin];
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uint32_t *src_ptr = &flashio_worker_begin;
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uint32_t *dst_ptr = func;
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while (src_ptr != &flashio_worker_end)
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*(dst_ptr++) = *(src_ptr++);
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((void(*)(uint8_t*, int))func)(data, len);
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}
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// --------------------------------------------------------
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void putchar(char c)
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{
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if (c == '\n')
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@ -32,6 +52,35 @@ void print_hex(uint32_t v, int digits)
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}
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}
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void print_dec(uint32_t v)
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{
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if (v >= 100) {
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print(">=100");
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return;
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}
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if (v >= 90) { putchar('9'); v -= 90; }
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else if (v >= 80) { putchar('8'); v -= 80; }
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else if (v >= 70) { putchar('7'); v -= 70; }
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else if (v >= 60) { putchar('6'); v -= 60; }
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else if (v >= 50) { putchar('5'); v -= 50; }
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else if (v >= 40) { putchar('4'); v -= 40; }
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else if (v >= 30) { putchar('3'); v -= 30; }
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else if (v >= 20) { putchar('2'); v -= 20; }
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else if (v >= 10) { putchar('1'); v -= 10; }
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if (v >= 9) { putchar('9'); v -= 9; }
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else if (v >= 8) { putchar('8'); v -= 8; }
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else if (v >= 7) { putchar('7'); v -= 7; }
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else if (v >= 6) { putchar('6'); v -= 6; }
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else if (v >= 5) { putchar('5'); v -= 5; }
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else if (v >= 4) { putchar('4'); v -= 4; }
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else if (v >= 3) { putchar('3'); v -= 3; }
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else if (v >= 2) { putchar('2'); v -= 2; }
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else if (v >= 1) { putchar('1'); v -= 1; }
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else putchar('0');
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}
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char getchar_prompt(char *prompt)
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{
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int32_t c = -1;
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@ -65,28 +114,101 @@ char getchar()
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// --------------------------------------------------------
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extern uint32_t cmd_read_spi_flash_id_worker_begin;
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extern uint32_t cmd_read_spi_flash_id_worker_end;
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void cmd_read_spi_flash_id()
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{
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uint32_t *src_ptr = &cmd_read_spi_flash_id_worker_begin;
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uint32_t *dst_ptr = &sram;
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uint8_t buffer[17] = { 0x9F, /* zeros */ };
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flashio(buffer, 17);
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while (src_ptr != &cmd_read_spi_flash_id_worker_end)
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*(dst_ptr++) = *(src_ptr++);
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((void(*)())&sram)();
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for (int i = 0; i < 16; i++) {
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for (int i = 1; i <= 16; i++) {
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putchar(' ');
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print_hex(((uint8_t*)&sram)[i], 2);
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print_hex(buffer[i], 2);
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}
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putchar('\n');
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}
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// --------------------------------------------------------
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uint8_t cmd_read_spi_flash_regs_print(uint32_t addr, const char *name)
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{
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uint8_t buffer[6] = {0x65, addr >> 16, addr >> 8, addr, 0, 0};
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flashio(buffer, 6);
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print("0x");
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print_hex(addr, 6);
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print(" ");
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print(name);
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print(" 0x");
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print_hex(buffer[5], 2);
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print("\n");
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return buffer[5];
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}
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void cmd_read_spi_flash_regs()
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{
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print("\n");
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uint8_t sr1v = cmd_read_spi_flash_regs_print(0x800000, "SR1V");
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uint8_t sr2v = cmd_read_spi_flash_regs_print(0x800001, "SR2V");
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uint8_t cr1v = cmd_read_spi_flash_regs_print(0x800002, "CR1V");
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uint8_t cr2v = cmd_read_spi_flash_regs_print(0x800003, "CR2V");
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uint8_t cr3v = cmd_read_spi_flash_regs_print(0x800004, "CR3V");
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uint8_t vdlp = cmd_read_spi_flash_regs_print(0x800005, "VDLP");
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}
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// --------------------------------------------------------
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void cmd_benchmark()
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{
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uint8_t data[256];
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uint32_t *words = (void*)data;
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uint32_t x32 = 314159265;
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uint32_t cycles_begin, cycles_end;
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uint32_t instns_begin, instns_end;
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__asm__ volatile ("rdcycle %0" : "=r"(cycles_begin));
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__asm__ volatile ("rdinstret %0" : "=r"(instns_begin));
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for (int i = 0; i < 20; i++)
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{
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for (int k = 0; k < 256; k++)
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{
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x32 ^= x32 << 13;
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x32 ^= x32 >> 17;
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x32 ^= x32 << 5;
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data[k] = x32;
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}
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for (int k = 0, p = 0; k < 256; k++)
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{
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if (data[k])
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data[p++] = k;
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}
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for (int k = 0, p = 0; k < 64; k++)
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{
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x32 = x32 ^ words[k];
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}
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}
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__asm__ volatile ("rdcycle %0" : "=r"(cycles_end));
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__asm__ volatile ("rdinstret %0" : "=r"(instns_end));
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print("Cycles: 0x");
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print_hex(cycles_end - cycles_begin, 8);
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putchar('\n');
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print("Instns: 0x");
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print_hex(instns_end - instns_begin, 8);
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putchar('\n');
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print("Chksum: 0x");
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print_hex(x32, 8);
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putchar('\n');
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}
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// --------------------------------------------------------
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void main()
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{
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reg_uart_clkdiv = 104;
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@ -102,10 +224,40 @@ void main()
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while (1)
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{
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print("\n");
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print("\n");
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print("SPI State:\n");
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print(" DDR ");
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if ((reg_spictrl & (1 << 22)) != 0)
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print("ON");
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else
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print("OFF");
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print(" (latency=");
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print_dec((reg_spictrl >> 16) & 15);
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print(")\n");
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print(" QSPI ");
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if ((reg_spictrl & (1 << 21)) != 0)
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print("ON\n");
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else
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print("OFF\n");
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print(" XIP ");
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if ((reg_spictrl & (1 << 20)) != 0)
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print("ON\n");
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else
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print("OFF\n");
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print("\n");
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print("Select an action:\n");
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print("\n");
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print(" [1] Read SPI Flash ID\n");
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print(" [2] Read SPI Config Regs\n");
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print(" [3] Enable/disable DDR\n");
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print(" [4] Enable/disable QSPI\n");
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print(" [5] Enable/disable XIP\n");
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print(" [0] Run simplistic benchmark\n");
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print("\n");
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for (int rep = 10; rep > 0; rep--)
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@ -120,10 +272,28 @@ void main()
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{
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case '1':
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cmd_read_spi_flash_id();
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rep = 0;
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break;
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case '2':
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cmd_read_spi_flash_regs();
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break;
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case '3':
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reg_spictrl ^= 1 << 22;
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break;
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case '4':
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reg_spictrl ^= 1 << 21;
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break;
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case '5':
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reg_spictrl ^= 1 << 20;
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break;
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case '0':
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cmd_benchmark();
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break;
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default:
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continue;
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}
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break;
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}
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}
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}
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}
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@ -72,13 +72,13 @@ module picosoc (
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assign iomem_addr = mem_addr;
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assign iomem_wdata = mem_wdata;
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wire spimemio_cfgreg_sel = (mem_addr == 32'h 0200_0000);
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wire spimemio_cfgreg_sel = mem_valid && (mem_addr == 32'h 0200_0000);
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wire [31:0] spimemio_cfgreg_do;
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wire simpleuart_reg_div_sel = (mem_addr == 32'h 0200_0004);
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wire simpleuart_reg_div_sel = mem_valid && (mem_addr == 32'h 0200_0004);
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wire [31:0] simpleuart_reg_div_do;
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wire simpleuart_reg_dat_sel = (mem_addr == 32'h 0200_0008);
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wire simpleuart_reg_dat_sel = mem_valid && (mem_addr == 32'h 0200_0008);
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wire [31:0] simpleuart_reg_dat_do;
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wire simpleuart_reg_dat_wait;
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@ -108,7 +108,7 @@ module spimemio (
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config_ddr <= 0;
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config_qspi <= 0;
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config_cont <= 0;
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config_dummy <= 0;
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config_dummy <= 8;
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end else begin
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if (cfgreg_we[0]) begin
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config_csb <= cfgreg_di[5];
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@ -39,63 +39,52 @@ call main
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loop:
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j loop
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.global cmd_read_spi_flash_id_worker_begin
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.global cmd_read_spi_flash_id_worker_end
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.global flashio_worker_begin
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.global flashio_worker_end
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cmd_read_spi_flash_id_worker_begin:
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flashio_worker_begin:
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# a0 ... data pointer
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# a1 ... data length
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# address of SPI ctrl reg
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li t0, 0x02000000
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# Manual Ctrl
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li t1, 0x00
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sb t1, 3(t0)
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# CS high, IO0 is output
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# Set CS high, IO0 is output
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li t1, 0x120
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sh t1, 0(t0)
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# CS low
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sb zero, 0(t0)
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# Enable Manual SPI Ctrl
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li t1, 0x00
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sb t1, 3(t0)
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# Send 0x9F (EDEC-ID Read)
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li t2, 0x9F
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li t3, 8
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cmd_read_spi_flash_id_worker_L1:
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# SPI transfer
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flashio_worker_L1:
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beqz a1, flashio_worker_L3
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li t5, 8
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lbu t2, 0(a0)
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flashio_worker_L2:
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srli t4, t2, 7
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andi t4, t4, 0x01
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sb t4, 0(t0)
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ori t4, t4, 0x10
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slli t2, t2, 1
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addi t3, t3, -1
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sb t4, 0(t0)
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bnez t3, cmd_read_spi_flash_id_worker_L1
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# Read 16 bytes and store in zero page
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li t3, 0
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li a2, 16
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cmd_read_spi_flash_id_worker_L2:
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li a0, 8
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li a1, 0
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cmd_read_spi_flash_id_worker_L3:
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sb zero, 0(t0)
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li t4, 0x10
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sb t4, 0(t0)
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lb t4, 0(t0)
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lbu t4, 0(t0)
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andi t4, t4, 2
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srli t4, t4, 1
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slli a1, a1, 1
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or a1, a1, t4
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addi a0, a0, -1
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bnez a0, cmd_read_spi_flash_id_worker_L3
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sb a1, 0(t3)
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addi t3, t3, 1
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bne t3, a2, cmd_read_spi_flash_id_worker_L2
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slli t2, t2, 1
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or t2, t2, t4
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andi t2, t2, 0xff
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addi t5, t5, -1
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bnez t5, flashio_worker_L2
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sb t2, 0(a0)
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addi a0, a0, 1
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addi a1, a1, -1
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j flashio_worker_L1
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flashio_worker_L3:
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# back to MEMIO mode
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# Back to MEMIO mode
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li t1, 0x80
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sb t1, 3(t0)
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ret
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cmd_read_spi_flash_id_worker_end:
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flashio_worker_end:
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