remove BARREL_SHIFTER.

This commit is contained in:
colin.liang 2023-01-12 17:48:48 +08:00
parent 3cfab6b748
commit 2d6b66d3b4
1 changed files with 7 additions and 8 deletions

View File

@ -43,7 +43,6 @@
***************************************************************/ ***************************************************************/
module picorv32 #( module picorv32 #(
parameter [0:0] BARREL_SHIFTER = 0,
parameter [0:0] ENABLE_TRACE = 0, parameter [0:0] ENABLE_TRACE = 0,
parameter [31:0] MASKED_IRQ = 32'h0000_0000, parameter [31:0] MASKED_IRQ = 32'h0000_0000,
parameter [31:0] LATCHED_IRQ = 32'hffff_ffff, parameter [31:0] LATCHED_IRQ = 32'hffff_ffff,
@ -842,8 +841,8 @@ module picorv32 #(
instr_xori || instr_xor: alu_out = reg_op1 ^ reg_op2; instr_xori || instr_xor: alu_out = reg_op1 ^ reg_op2;
instr_ori || instr_or: alu_out = reg_op1 | reg_op2; instr_ori || instr_or: alu_out = reg_op1 | reg_op2;
instr_andi || instr_and: alu_out = reg_op1 & reg_op2; instr_andi || instr_and: alu_out = reg_op1 & reg_op2;
BARREL_SHIFTER && (instr_sll || instr_slli): alu_out = alu_shl; 0: alu_out = alu_shl;
BARREL_SHIFTER && (instr_srl || instr_srli || instr_sra || instr_srai): alu_out = alu_shr; 0: alu_out = alu_shr;
endcase endcase
end end
@ -1161,7 +1160,7 @@ module picorv32 #(
cpu_state <= cpu_state_ldmem; cpu_state <= cpu_state_ldmem;
mem_do_rinst <= 1; mem_do_rinst <= 1;
end end
is_slli_srli_srai && !BARREL_SHIFTER: begin is_slli_srli_srai: begin
`debug($display("LD_RS1: %2d 0x%08x", decoded_rs1, cpuregs_rs1);) `debug($display("LD_RS1: %2d 0x%08x", decoded_rs1, cpuregs_rs1);)
reg_op1 <= cpuregs_rs1; reg_op1 <= cpuregs_rs1;
dbg_rs1val <= cpuregs_rs1; dbg_rs1val <= cpuregs_rs1;
@ -1169,12 +1168,12 @@ module picorv32 #(
reg_sh <= decoded_rs2; reg_sh <= decoded_rs2;
cpu_state <= cpu_state_shift; cpu_state <= cpu_state_shift;
end end
is_jalr_addi_slti_sltiu_xori_ori_andi, is_slli_srli_srai && BARREL_SHIFTER: begin is_jalr_addi_slti_sltiu_xori_ori_andi: begin
`debug($display("LD_RS1: %2d 0x%08x", decoded_rs1, cpuregs_rs1);) `debug($display("LD_RS1: %2d 0x%08x", decoded_rs1, cpuregs_rs1);)
reg_op1 <= cpuregs_rs1; reg_op1 <= cpuregs_rs1;
dbg_rs1val <= cpuregs_rs1; dbg_rs1val <= cpuregs_rs1;
dbg_rs1val_valid <= 1; dbg_rs1val_valid <= 1;
reg_op2 <= is_slli_srli_srai && BARREL_SHIFTER ? decoded_rs2 : decoded_imm; reg_op2 <= decoded_imm;
mem_do_rinst <= mem_do_prefetch; mem_do_rinst <= mem_do_prefetch;
cpu_state <= cpu_state_exec; cpu_state <= cpu_state_exec;
end end
@ -1194,7 +1193,7 @@ module picorv32 #(
cpu_state <= cpu_state_stmem; cpu_state <= cpu_state_stmem;
mem_do_rinst <= 1; mem_do_rinst <= 1;
end end
is_sll_srl_sra && !BARREL_SHIFTER: begin is_sll_srl_sra: begin
cpu_state <= cpu_state_shift; cpu_state <= cpu_state_shift;
end end
default: begin default: begin
@ -1236,7 +1235,7 @@ module picorv32 #(
cpu_state <= cpu_state_stmem; cpu_state <= cpu_state_stmem;
mem_do_rinst <= 1; mem_do_rinst <= 1;
end end
is_sll_srl_sra && !BARREL_SHIFTER: begin is_sll_srl_sra: begin
cpu_state <= cpu_state_shift; cpu_state <= cpu_state_shift;
end end
default: begin default: begin